CRYSTAL OSCILLATORS
SMD-752 SERIES ( Ceramic Package )
Application of SMD LVDS：
SONET/SDH
Fiber Channel
Wideband WLAN AP
XDSL
1G/10G Ethernet
Feature
LVDS Complementary output
Low phase jitter ( 12KHz to 20MHz ) under 4 ps ( RMS )
Low profile package design (
1.9mm height max.
)
Special side-pad design for
jitter improvement option
( patent applying )
RoHS compliance
Specification
MODE
FREQ. RANGE
MHz
FREQ. STABILITY*
ppm
TEMP. RANGE
OPERATING TEMP.
°C
STORAGE TEMP.
°C
POWER SUPPLY VOLTAGE
V DC
V (Max)
OUPUT VOLTAGE HIGH ( V
OH
)
V (Min)
OUPUT VOLTAGE LOW ( V
OL
)
mV
DIFFERENTIAL OUTPUT VOLTAGE (V
OD
)
V
OFFSET VOLTAGE (V
OS
)
OUPUT LOAD (BWTWEEN Q AND QN)
Ω
OUTPUT SYMMETRY
%
INPUT CURRENT
160~ 800MHz
mA (Max)
INPUT VOLTAGE
ENABLE HIGH INPUT VOLTAGE
V (Min)
ENABLE LOW INPUT VOLTAGE
V (Max)
RISE / FALL TIME ( 20% / 80% )
160~800MHz
nS (Max)
AGING
ppm/Year
*Inclusive of 25°C±3°C & Operating Temperature Range
。
SMD-752S
SMD-752L
187.5，200，212.5，250，312.5，320，350，622.08
A: ± 100 B: ± 50 X: ± 30 C: ± 25
0 ~ + 70，- 40 ~ + 85
- 55 ~ + 125
+2.5±5%
1.600
0.900
247 ~ 454
1.125 ~ 1.375
100
45~55 %
100
1.75
0.75
1.5
±3
110
2.31
0.99
+3.3±10%
1.600
0.900
247 ~ 454
1.125 ~ 1.375
Enable / Disable Function
Dimension (mm)
C1* : A 0.01 uF or 0.1 uF decoupling capacitor is recommended
。
C2** : By-pass capacitor for the noise suppression
。
( please contact AKER's engineer dept.
for the recommended capacitor value )
Parts Numbering Guide
Example: SMD-125000-7BL0T0
Analog electronics
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