LV 5 - S e r i e s S p e c i f i c a t i o n s
5.00L x 3.20W x 1.20H (mm)
PDI Model
LV5-Series
provides precision timing in a hermetically
sealed package. These high performance clock oscillators offer very low integrated
phase jitter and superior phase noise. PDI provides quick-turn sampling for your
proto-typing needs, mass production capability, and competitive pricing.
ex)
LV5—T—50000X—M—C—A—2—R—X
*
ENABLE
T
= Tri-State
N
= No/Connect
FREQUENCY
40000X-99999X
=
40.0000 MHz –
99.999 MHz
C10000-C20000
=
100.00 MHz –
200.00 MHz
OUTPUT
M
= LVDS
FREQUENCY
STABILITY
B
= ±25
C
= ±50
D
= ±100
S
= Special
OPERATING
TEMPERATURE
A
= 0 to +70°C
B
= -20 to +70°C
D
= -40 to +85°C
S
= Special
SUPPLY
VOLTAGE
2
= 2.5
3
= 3.3
PACKAGE
R
= Tape & Reel
* - for standard or assigned for customization.
Parameter
Frequency Range
*1
Frequency Stability
*1
Temperature Range
*1
Supply Current (Maximum)
Output
Load (Typical)
Duty Cycle (Maximum)
Rise/Fall Times (Maximum)
Start up Time (Maximum)
Output Voltage Levels
Differential Voltage
High Voh (RL = 100Ω)
Low Vol (RL = 100Ω)
All Causes (Maximum )
Operating
Storage
*2
Supply Voltage
*1
(±5%)
3.3
2.5
40.000000 to 200.000000
Per Option
Per Option
-55 to +125
40
Differential LVDS Squarewave
100
45/55
0.4
0.4
10.0
1.43 Typical , 1.60 Maximum
0.90 Minimum , 1.10 Typical
250 Min , 350 Typ , 450 Max
Enable
Disable
70
30
10
2.0
0.2
0.3 Typical , 1.0 Maximum
-138
-144
Units
V
MHz
ppm
°C
°C
mA
Ω
%
nS
mS
V
mV
Between Output and Comp Output
@ 50% Vcc
Rise Time (20% to 80% Vcc)
Fall Time (80% to 20% Vcc)
High (See below) or Open
Low (See below)
*3
High Value (Minimum)
Pin 1 (Tri-State) (Option)
Low Value (Maximum)
*3
Disable Current (Typical)
*3
Enable Delay Time (Maximum)
Disable Delay Time (Maximum)
Integrated Phase Jitter (RMS)
12KHz to 20MHz
@ 10KHz Offset
Phase Noise (Typical)
@ 100KHz Offset
*1 - Not all Frequency/Temperature/Voltage combinations are available.
*2 - Inclusive of Tolerance @25°C, Operating Temperature, Supply Voltage, Load, Aging, Shock and Vibration.
*3 - Internal crystal oscillation halted.
REV:
NA
SIZE:
A
% Vcc
% Vcc
uA
mS
uS
pS
dBc/Hz
CAGE:
0S4G1
1
of
4
LV 5 - S e r i e s
5 . 0 0 x 3 . 2 0 x 1 . 2 0
( m m )
PA C K A G E D I M E N S I O N S
PIN
1
2
3
4
5
6
CONNECTION
Tri-State or No Connect
No Connect
Ground/Case
Output
Complementary Output
Supply Voltage
Decimal XXX = ± .008, XX = ± .02 Metric [XXX = ± .20], [XX = ± .50]
.197 ±.006
[5.00 ±.15]
.126 ±.006
[3.20 ±.15]
PDI Frequency
Date Code
Last 7 digits of
PDI part number
.100
[2.54]
.050
[1.27]
Pin 1
Traceability Code
.039
[1.00]
.051
[1.30]
6
5
4
.047 ±.004
[1.20 ±.10]
.100
[2.54]
.050
[1.27]
1
2
3
1
2
3
.033
[0.84]
Recommended Land Pattern
(Top View)
.047 ±.004
[1.20 ±.10]
6
5
4
.025
[0.64]
NOTES:
Terminals are Au.
Other options are available, please consult factory.
All product is supplied
RoHS
and
REACH
compliant.
Product can be supplied on Tape and Reel, on reels of 1,000 units.
Specifications subject to change without notice, last updated 4/1/13.
REV:
NA
SIZE:
A
CAGE:
0S4G1
3
of
4
LV 5 - S e r i e s
5 . 0 0 x 3 . 2 0 x 1 . 2 0
( m m )
1.
Material: Black Conductive Polystyrene or equivalent.
2.
10 Sprocket Hole pitch cumulative tolerance of ±.008.
3.
Camber in compliance with EIA 481.
4.
Empty pockets: Trailing end (Minimum) 200 mm. and Leading end (Minimum) 400 mm.
5.
Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole.
.012±.002
[0.30±.05]
Ø.059
[Ø1.50]
.069
[1.75]
.079
[2.00]
.157 Typ.
[4.00 Typ.]
A
.217
[5.50]
.472 ±.012
[12.00 ±.30]
Section A-A
.315 Typ.
[8.00 Typ.]
A
.480
[12.20]
120°
Ø7.09
[Ø180.00]
3.15
[80.00]
REV:
NA
SIZE:
A
CAGE:
0S4G1
4
of
4
Microcontroller MCU
京公网安备 11010802033920号
EEWORLD
