Data Sheet
FEATURES
Fixed gain of 2000
Access to internal nodes provides flexibility
Low noise: 1.5 nV/√Hz input voltage noise
High accuracy dc performance
Gain drift: 10 ppm/°C
Offset drift: 1 μV/°C
Gain accuracy: 0.2%
CMRR: 130 dB min
Excellent ac specifications
Bandwidth: 3.5 MHz
Slew rate: 40 V/μs
Power supply range: ±4 V to ±18 V
8-pin SOIC package
ESD protection >5000 V (HBM)
Temperature range for specified performance:
−40°C to +85°C
Operational up to 125°C
Low Noise, Low Gain Drift, G = 2000
Instrumentation Amplifier
AD8428
FUNCTIONAL BLOCK DIAGRAM
+V
S
–FIL
–IN
3kΩ
30.15Ω
3kΩ
+IN
09731-001
6kΩ
6kΩ
120kΩ
OUT
6kΩ
6kΩ
120kΩ
REF
AD8428
–V
S
+FIL
Figure 1.
Table 1. Instrumentation Amplifiers by Category
1
General-
Purpose
AD8220
AD8221
AD8222
AD8224
AD8228
AD8295
Zero
Drift
AD8231
AD8290
AD8293
AD8553
AD8556
AD8557
Military
Grade
AD620
AD621
AD524
AD526
AD624
Low
Power
AD627
AD623
AD8235
AD8236
AD8426
AD8226
AD8227
Low
Noise
AD8428
AD8429
APPLICATIONS
Sensor interface
Medical instrumentation
Patient monitoring
1
See
www.analog.com
for the latest instrumentation amplifiers.
GENERAL DESCRIPTION
The
AD8428
is an ultralow noise instrumentation amplifier
designed to accurately measure tiny, high speed signals. It
delivers industry-leading gain accuracy, noise, and bandwidth.
All gain setting resistors for the
AD8428
are internal to the part
and are precisely matched. Care is taken in both the chip pinout
and layout. This results in excellent gain drift and quick settling
to the final gain value after the part is powered on.
The high CMRR of the
AD8428
prevents unwanted signals
from corrupting the signal of interest. The pinout of the
AD8428
is designed to avoid parasitic capacitance mismatches that can
degrade CMRR at high frequencies.
The
AD8428
is one of the fastest instrumentation amplifiers
available. The circuit architecture is designed for high bandwidth
at high gain. The
AD8428
uses a current feedback topology for
the initial preamplifier gain stage of 200, followed by a difference
amplifier stage of 10. This architecture results in a 3.5 MHz
bandwidth at a gain of 2000 for an equivalent gain bandwidth
product of 7 GHz.
The
AD8428
pinout allows access to internal nodes between the
first and second stages. This feature can be useful for modifying
the frequency response between the two amplification stages,
thereby preventing unwanted signals from contaminating the
output results.
The performance of the
AD8428
is specified over the industrial
temperature range of −40°C to +85°C. It is available in an 8-lead
plastic SOIC package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
AD8428
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Data Sheet
Theory of Operation ...................................................................... 13
Architecture ................................................................................ 13
Filter Terminals........................................................................... 13
Reference Terminal .................................................................... 13
Input Voltage Range ................................................................... 14
Layout .......................................................................................... 14
Input Bias Current Return Path ............................................... 15
Input Protection ......................................................................... 15
Radio Frequency Interference (RFI) ........................................ 16
Calculating the Noise of the Input Stage ................................. 16
Outline Dimensions ....................................................................... 18
Ordering Guide .......................................................................... 18
REVISION HISTORY
10/11—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
Data Sheet
SPECIFICATIONS
V
S
= ±15 V, V
REF
= 0 V, T
A
= 25°C, G = 2000, R
L
= 10 kΩ, unless otherwise noted.
Table 2.
Parameter
COMMON-MODE REJECTION RATIO (RTI)
CMRR, DC to 60 Hz
CMRR at 50 kHz
NOISE (RTI)
Voltage Noise
Current Noise
VOLTAGE OFFSET
Input Offset, V
OSI
Average TC
Offset RTI vs. Supply (PSRR)
INPUT CURRENT
Input Bias Current
Over Temperature
Input Offset Current
Over Temperature
DYNAMIC RESPONSE
−3 dB Small Signal Bandwidth
Settling Time to 0.01%
Settling Time to 0.001%
Slew Rate
GAIN
First Stage Gain
Subtractor Stage Gain
Total Gain Error
Total Gain Nonlinearity
Total Gain vs. Temperature
INPUT
Impedance (Pin to Ground)
1
Input Operating Voltage Range
Over Temperature
OUTPUT
Output Swing
Over Temperature
Output Swing
Over Temperature
Short-Circuit Current
REFERENCE INPUT
R
IN
I
IN
Voltage Range
Reference Gain to Output
Reference Gain Error
Test Conditions/Comments
V
CM
= ±10 V
Min
130
110
V
IN
+, V
IN
− = 0 V
f = 1 kHz
f = 0.1 Hz to 10 Hz
f = 1 kHz
f = 0.1 Hz to 10 Hz
1.3
40
1.5
150
1.5
50
Typ
Max
AD8428
Unit
dB
dB
nV/√Hz
nV p-p
pA/√Hz
pA p-p
μV
μV/°C
dB
nA
pA/°C
nA
pA/°C
MHz
μs
μs
V/μs
V/V
V/V
%
ppm
ppm/°C
GΩ||pF
V
V
V
V
V
V
V
V
mA
kΩ
μA
V
V/V
%
T
A
= −40°C to +85°C
120
100
1
200
T
A
= −40°C to +85°C
T
A
= −40°C to +85°C
250
50
20
3.5
0.75
1.4
50
200
10
V
OUT
= −10 V to +10 V
V
OUT
= −10 V to +10 V
0.2
5
10
1||2
V
S
= ±4 V to ±18 V
T
A
= −40°C to +85°C
R
L
= 2 kΩ
T
A
= −40°C
T
A
= +85°C
R
L
= 10 kΩ
T
A
= −40°C
T
A
= +85°C
−V
S
+ 2.5
−V
S
+ 2.5
−V
S
+ 1.7
−V
S
+ 2.0
−V
S
+ 1.6
−V
S
+ 1.7
−V
S
+ 1.8
−V
S
+ 1.4
30
132
6.5
−V
S
1
0.01
+V
S
+V
S
− 2.5
+V
S
− 2.5
+V
S
− 1.2
+V
S
− 1.3
+V
S
− 1.1
+V
S
− 1.0
+V
S
− 1.2
+V
S
− 0.9
10 V step
10 V step
40
V
IN
+, V
IN
− = 0 V
Rev. 0 | Page 3 of 20
AD8428
Parameter
FILTER TERMINALS
R
IN 2
Voltage Range
POWER SUPPLY
Operating Range
Quiescent Current
Over Temperature
1
2
Data Sheet
Test Conditions/Comments
Min
Typ
6
−V
S
±4
6.5
T
A
= −40°C to +85°C
+V
S
±18
6.8
8
Max
Unit
kΩ
V
V
mA
mA
The differential and common-mode input impedances can be calculated from the pin impedance: Z
DIFF
= 2(Z
PIN
); Z
CM
= Z
PIN
/2.
To calculate the actual impedance, see Figure 1.
Rev. 0 | Page 4 of 20
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Output Short-Circuit Current Duration
Maximum Voltage at −IN, +IN
1
Maximum Voltage at −FIL, +FIL
Differential Input Voltage
1
Maximum Voltage at REF
Storage Temperature Range
Specified Temperature Range
Maximum Junction Temperature
ESD
Human Body Model
Charged Device Model
Machine Model
1
AD8428
THERMAL RESISTANCE
Rating
±18 V
Indefinite
±V
S
±V
S
±1 V
±V
S
−65°C to +150°C
−40°C to +85°C
140°C
5000 V
1250 V
400 V
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package
8-Lead SOIC_N
θ
JA
121
Unit
°C/W
ESD CAUTION
For voltages beyond these limits, use input protection resistors. See the
Input Protection section for more information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 5 of 20