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BC856_11

Description
Surface Mount General Purpose Si-Epi-Planar Transistors
File Size94KB,2 Pages
ManufacturerDIOTEC
Websitehttp://www.diotec.com/
Download Datasheet View All

BC856_11 Overview

Surface Mount General Purpose Si-Epi-Planar Transistors

BC856 ... BC860
BC856 ... BC860
PNP
Surface Mount General Purpose Si-Epi-Planar Transistors
Si-Epi-Planar Universaltransistoren für die Oberflächenmontage
Power dissipation – Verlustleistung
2.9
±0.1
0.4
3
1.3
1.1
PNP
250 mW
SOT-23
(TO-236)
0.01 g
Version 2011-07-11
Plastic case
Kunststoffgehäuse
±0.1
Type
Code
1
1.9
2
2.5 max
Weight approx. – Gewicht ca.
Plastic material has UL classification 94V-0
Gehäusematerial UL94V-0 klassifiziert
Standard packaging taped and reeled
Standard Lieferform gegurtet auf Rolle
Dimensions - Maße [mm]
1=B
2=E
3=C
Maximum ratings (T
A
= 25°C)
Grenzwerte (T
A
= 25°C)
BC856
BC857
BC860
45 V
50 V
5V
250 mW
1
)
100 mA
200 mA
-55...+150°C
-55…+150°C
BC858
BC859
30 V
30 V
Collector-Emitter-volt. – Kollektor-Emitter-Spannung
Collector-Base-voltage – Kollektor-Basis-Spannung
Emitter-Base-voltage – Emitter-Basis-Spannung
Power dissipation – Verlustleistung
Collector current – Kollektorstrom (dc)
Peak Collector current – Kollektor-Spitzenstrom
Junction temperature – Sperrschichttemperatur
Storage temperature – Lagerungstemperatur
B open
E open
C open
- V
CEO
- V
CBO
- V
EBO
P
tot
- I
C
- I
CM
T
j
T
S
65 V
80 V
Characteristics (T
j
= 25°C)
Min.
DC current gain – Kollektor-Basis-Stromverhältnis
- V
CE
= 5 V, - I
C
= 10 µA
Group A
Group B
Group C
Group A
Group B
Group C
H
FE
h
FE
h
FE
H
FE
h
FE
h
FE
- V
CEsat
- V
CEsat
- V
BEsat
- V
BEsat
125
220
420
Kennwerte (T
j
= 25°C)
Typ.
90
150
270
180
290
520
700 mV
900 mV
Max.
250
475
800
300 mV
650 mV
- V
CE
= 5 V, - I
C
= 2 mA
Collector-Emitter saturation voltage – Kollektor-Sättigungsspannung
2
)
I
C
= 10 mA, I
B
= 0.5 mA
I
C
= 100 mA, I
B
= 5 mA
Base-Emitter saturation voltage – Basis-Sättigungsspannung
2
)
I
C
= 10 mA, I
B
= 0.5 mA
I
C
= 100 mA, I
B
= 5 mA
1
2
Mounted on P.C. board with 3 mm
2
copper pad at each terminal
Montage auf Leiterplatte mit 3 mm
2
Kupferbelag (Lötpad) an jedem Anschluss
Tested with pulses t
p
= 300 µs, duty cycle ≤ 2% – Gemessen mit Impulsen t
p
= 300 µs, Schaltverhältnis ≤ 2%
http://www.diotec.com/
© Diotec Semiconductor AG
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