Data Sheet
Rev.
2.2.1
/
January 2012
ZIOL2xxx IC Family
IO-Link compliant HV Line Driver IC Family
Data Sheet
January 31, 2012
©
2012
Zentrum Mikroelektronik Dresden AG — Rev.
2.2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is
PRELIMINARY
and subject to
changes without notice.
1 of 90
ZIOL2xxx
– IC Family
IO-Link compliant HV Line Driver IC Family
Contents
1
2
The ZIOL2xxx IC Family Overview .......................................................................................6
Electrical Characteristics ......................................................................................................7
2.1. Absolute Maximum Ratings ............................................................................................7
2.2. Operating Conditions ......................................................................................................8
2.3. Electrical Parameters ......................................................................................................9
Detailed Description............................................................................................................15
3.1. Block schematic ............................................................................................................15
3.2. Dual Channel Transceiver.............................................................................................16
3.2.1. IC Data Path Configuration ......................................................................................16
3.2.2. Transmitter ..............................................................................................................20
3.2.3. Receiver ..................................................................................................................22
3.3. System Control .............................................................................................................24
3.3.1. General....................................................................................................................24
3.3.2. IO-Link Master and Device Mode ............................................................................25
3.3.3. Internal Exceptions ..................................................................................................25
3.3.4. IO-Link specific Wake-Up (WURQ)..........................................................................25
3.3.5. IC Self-Protection – Lock Mode ...............................................................................27
3.3.6. Channel Locking in Master/Device Mode ................................................................29
3.3.7. Memory Unit ............................................................................................................29
3.3.8. Serial Peripheral Interface (SPI) ..............................................................................31
3.3.9. Register Table / Registers for IC Configuration and Monitoring...............................36
3.3.10. Interrupt and IC Lock Mode Control.........................................................................46
3.3.11. Die Temperature Measurement ...............................................................................54
3.4. Smart Power Supply .....................................................................................................54
3.5. The Power Fail Detector ...............................................................................................56
3.5.1. Overview..................................................................................................................56
3.5.2. Line-Fault Detector ..................................................................................................56
3.5.3. Under-voltage Detector............................................................................................57
3.5.4. Channel Locking and Interrupt Generation ..............................................................57
3.5.5. Downward Compatibility ..........................................................................................57
©
2012
Zentrum Mikroelektronik Dresden AG — Rev.
2.2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is
PRELIMINARY
and subject to
changes without notice.
3
Data Sheet
January 31, 2012
2 of 90
ZIOL2xxx
– IC Family
IO-Link compliant HV Line Driver IC Family
3.6. DC/DC Converter ..........................................................................................................57
3.6.1. Principle of Operation ..............................................................................................57
3.6.2. Principle of Operation ..............................................................................................58
3.6.3. Dimensioning of external Devices............................................................................59
3.6.4. PCB Layout considerations .....................................................................................61
4
5
Application Information .......................................................................................................63
Pin Configuration, Latch-Up and ESD Protection ...............................................................68
5.1. Pin Configuration and Latch-up Conditions...................................................................68
5.2. ESD-Protection .............................................................................................................69
Package..............................................................................................................................70
6.1. Pin Hardware Configurations ........................................................................................70
6.2. Pin Diagram ..................................................................................................................70
6.3. Optimal PCB Layout......................................................................................................71
6.4. Package Outline............................................................................................................72
6.5. Device Marking .............................................................................................................73
Ordering Information...........................................................................................................74
Related Documents ............................................................................................................75
Glossary .............................................................................................................................76
9.1. Terms and Abbreviations ..............................................................................................76
9.2. Symbols used in this Datasheet ....................................................................................76
6
7
8
9
10 Document Revision History ................................................................................................78
Appendix A
ZIOL2xxx Diagnostic Techniques .....................................................................80
A.1. General Remarks ..........................................................................................................80
A.2. Overload Counter Behavior and Peak Register Access................................................80
A.3. Overload Counter and Lock Reset Methods .................................................................84
Appendix B
Appendix C
ZIOL2xxx Configuration Techniques.................................................................87
ZIOL2xxx Line Fail Detector .............................................................................89
Data Sheet
January 31, 2012
©
2012
Zentrum Mikroelektronik Dresden AG — Rev.
2.2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is
PRELIMINARY
and subject to
changes without notice.
3 of 90
ZIOL2xxx
– IC Family
IO-Link compliant HV Line Driver IC Family
List of Figures
Figure 2.1
Figure 2.2
Figure 3.1
Figure 3.2
Figure 3.3
Figure 3.4
Figure 3.5
Figure 3.6
Figure 3.7
Figure 3.8
Figure 3.9
Figure 3.10
Figure 3.11
Figure 3.12
Figure 3.13
Figure 3.14
Figure 3.15
Figure 3.16
Figure 3.17
Figure 3.18
Figure 3.19
Figure 3.20
Figure 3.21
Figure 3.22
Figure 3.23
Figure 3.24
Figure 4.1
Figure 4.2
Figure 4.3
Figure 4.4
Figure 6.1
Figure 6.2
Figure 6.3
Figure 9.1
Figure 10.1
Figure 10.2
Figure 10.3
Figure 10.4
Figure 10.5
Data Sheet
January 31, 2012
Max. Total Power Dissipation ................................................................................................................7
Efficiency of the DC/DC converter for VOUT=5V, C=10µF and L=10µH ............................................14
Functional Block Diagram of the ZIOL2xxx .........................................................................................15
ZIOL24xx Transceiver Data Path in Principle......................................................................................16
ZIOL22xx Transceiver Data Path in Principle......................................................................................17
ZIOL21xx Transceiver Data Path in Principle......................................................................................18
ZIOL24xx in Device and Master Mode Application..............................................................................21
Typical IO-Link Device Configuration with HS driver only ...................................................................24
Wake-Up Signal Recognition...............................................................................................................26
The Basic Scheme of the IC Self Protection .......................................................................................28
Memory Unit.........................................................................................................................................30
General timing of a byte transfer .........................................................................................................32
Structure of SPI accesses ...................................................................................................................33
SPI Command Structure......................................................................................................................34
SPI Timing ...........................................................................................................................................36
Interrupt (INT_L pin) and Wake-up (WURQ_L pin) Signaling .............................................................47
COM Channel Lock Control.................................................................................................................49
AUX Channel Lock Control..................................................................................................................50
Over-Temperature Lock Control ..........................................................................................................51
Internal IC Sensors and related Overload and Over-Temperature Detection Circuits ........................53
Low Voltage Supply Concept...............................................................................................................55
PFD Working Principle.........................................................................................................................56
DC/DC Converter in Principle ..............................................................................................................58
DC/DC Converter Output Voltage as Function of R1 (R2 = 10kOhms) ..............................................60
High frequency critical loops of DC/DC converter for PCB layout.......................................................61
PCB layout of Evaluation board as an example ..................................................................................62
Simplified Application Circuit with the ZIOL2xxx in Device Mode .......................................................63
Simplified Application Circuit with the ZIOL2xxx in Master Mode .......................................................64
Power Line Fail Detection....................................................................................................................65
PCB Layout Recommendations...........................................................................................................66
Pin Diagram of the ZIOL2xxx...............................................................................................................71
Package Dimensions ...........................................................................................................................72
Top Marking of the ZIOL2xxx ..............................................................................................................73
Register Representation in Principle (Example)..................................................................................77
Peak Register Access Scenarios.........................................................................................................81
Overload Counter Behavior in permanent Over-Current Situations ....................................................82
Overload Counter Behavior in permanent Over-Temperature Situations ...........................................83
Overload Counter Behavior in typical Over-Temperature Situations ..................................................84
Partial Reset of Overload Counter or the entire Lock circuit ...............................................................85
©
2012
Zentrum Mikroelektronik Dresden AG — Rev.
2.2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is
PRELIMINARY
and subject to
changes without notice.
4 of 90
ZIOL2xxx
– IC Family
IO-Link compliant HV Line Driver IC Family
Figure 10.6 Configuration Checker Report of the ZIOL2xxx Application Kit (Example) .........................................87
List of Tables
Table 1.1
Table 2.1
Table 2.2
Table 2.3
Table 3.1
Table 3.2
Table 3.3
Table 3.4
Table 3.5
Table 3.6
Table 3.7
Table 3.8
Table 3.9
Table 4.1
Table 5.1
Table 6.1
Table 6.2
Table 10.1
ZIOL2xxx Product Matrix and Product Naming Convention..................................................................6
Absolute Maximum Ratings ...................................................................................................................7
Operating Conditions .............................................................................................................................8
Electrical Characteristics .......................................................................................................................9
Master-Device-Mode Function Table...................................................................................................19
Driver configurations ............................................................................................................................22
Receiver configurations .......................................................................................................................23
Sink Mode Configuration in Detail .......................................................................................................24
Example for building the SHIFT Byte...................................................................................................34
Valid Address and Length Combinations ............................................................................................34
Register Table......................................................................................................................................37
Temperature Sensor Levels ................................................................................................................54
Examples for the resistors R1 and R2 using E96 resistor series ........................................................59
Recommended External Components.................................................................................................67
Pin Configuration and Latch-Up Conditions ........................................................................................68
Availability of Pin Interconnections ......................................................................................................70
Package Dimensions in mm ................................................................................................................72
Abnormal Power Supply Situations .....................................................................................................89
Data Sheet
January 31, 2012
©
2012
Zentrum Mikroelektronik Dresden AG — Rev.
2.2.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is
PRELIMINARY
and subject to
changes without notice.
5 of 90
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