ADG1208YRZ1 datasheet, PDF - EEWORLD Datasheet

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ADG1208YRZ1: Description8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16; Categorysemiconductor Analog mixed-signal IC; File Size328KB，20 Pages; ManufacturerADI; Websitehttps://www.analog.com

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ADG1208YRZ1 Overview

8-CHANNEL, SGL ENDED MULTIPLEXER, PDSO16

ADG1208YRZ1 Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	16.5 V
Minimum supply/operating voltage	13.5 V
Rated supply voltage	15 V
Processing package description	ROHS COMPLIANT, MS-012AC, SOIC-16
Lead-free	Yes
EU RoHS regulations	Yes
China RoHS regulations	Yes
state	ACTIVE
Craftsmanship	CMOS
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	1.27 mm
terminal coating	MATTE TIN
Terminal location	DUAL
Packaging Materials	PLASTIC/EPOXY
Temperature level	AUTOMOTIVE
Number of inputs	8
Maximum on-time	115 ns
Maximum off time	140 ns
Analog IC other types	SGL ENDED MULTIPLEXER
Isolation Rating in Off State	85 dB
Maximum limit analog input voltage	16.5 V
Rated negative supply voltage	-15 V
Forward conduction resistance matching rating	3.5 ohm
Maximum on-state resistance	200 ohm

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Low Capacitance, 4-/8-Channel,

±15 V/+12 V

iCMOS

Multiplexers

ADG1208/ADG1209

FEATURES

<1 pC charge injection over full signal range

1 pF off capacitance

33 V supply range

120 Ω on resistance

Fully specified at ±15 V/+12 V

3 V logic compatible inputs

Rail-to-rail operation

Break-before-make switching action

Available in 16-lead TSSOP, 4 mm × 4 mm LFCSP_VQ, and

16-lead SOIC

Typical power consumption < 0.03 μW

FUNCTIONAL BLOCK DIAGRAMS

ADG1208

S1A

S4A

S1B

1-OF-8

DECODER

S4B

1-OF-4

DECODER

05713-001

ADG1209

A0 A1 A2 EN

APPLICATIONS

Audio and video routing

Automatic test equipment

Data-acquisition systems

Battery-powered systems

Sample-and-hold systems

Communication systems

Figure 1.

GENERAL DESCRIPTION

The ADG1208 and ADG1209 are monolithic,

iCMOS®

analog

multiplexers comprising eight single channels and four differential

channels, respectively. The ADG1208 switches one of eight

inputs to a common output as determined by the 3-bit binary

address lines A0, A1, and A2. The ADG1209 switches one of

four differential inputs to a common differential output as

determined by the 2-bit binary address lines A0 and A1. An

EN input on both devices is used to enable or disable the device.

When disabled, all channels are switched off. When on, each

channel conducts equally well in both directions and has an

input signal range that extends to the supplies.

The

iCMOS

(industrial CMOS) modular manufacturing

process combines high voltage CMOS (complementary metal-

oxide semiconductor) and bipolar technologies. It enables the

development of a wide range of high performance analog ICs

capable of 33 V operation in a footprint that no other generation

of high voltage parts has been able to achieve. Unlike analog ICs

using conventional CMOS processes,

iCMOS

components can

tolerate high supply voltages while providing increased

performance, dramatically lower power consumption, and

reduced package size.

The ultralow capacitance and exceptionally low charge injection

of these multiplexers make them ideal solutions for data acquisition

and sample-and-hold applications, where low glitch and fast

settling are required. Figure 2 shows that there is minimum

charge injection over the entire signal range of the device.

iCMOS

construction also ensures ultralow power dissipation,

making the parts ideally suited for portable and battery-

powered instruments.

1.0

MUX (SOURCE TO DRAIN)

0.9 T

= 25°C

0.8

CHARGE INJECTION (pC)

0.7

0.6

0.5

0.4

0.3

0.2

0.1

–15

–10

= +5V

= –5V

–5

(V)

05713-051

= +15V

= –15V

= +12V

= 0V

Figure 2. Source to Drain Charge Injection vs. Source Voltage

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

ADG1208/ADG1209

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagrams ............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Dual Supply ................................................................................... 3

Single Supply ................................................................................. 5

Absolute Maximum Ratings ............................................................7

ESD Caution...................................................................................7

Pin Configurations and Function Descriptions ............................8

Typical Performance Characteristics ........................................... 10

Terminology .................................................................................... 14

Test Circuits ..................................................................................... 15

Outline Dimensions ....................................................................... 17

Ordering Guide .......................................................................... 18

REVISION HISTORY

1/09—Rev. A to Rev. B

Change to I

Parameter, Table 1 ................................................... 4

Change to I

Parameter, Table 2 ................................................... 6

4/07—Rev. 0 to Rev. A

Added 16-lead SOIC .......................................................... Universal

Changes to Table 1 ............................................................................ 3

Changes to Table 2 ............................................................................ 5

Changes to Figure 10 and Figure 11 ............................................. 10

Updated Outline Dimensions ....................................................... 17

Changes to Ordering Guide .......................................................... 18

4/06—Revision 0: Initial Version

Rev. B | Page 2 of 20

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