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R1QKA3618CB

Description
36-Mbit QDR II SRAM 4-word Burst
File Size298KB,38 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet View All

R1QKA3618CB Overview

36-Mbit QDR II SRAM 4-word Burst

hinT=00000.0000.0000.0000.0000
--
-
00000.1100
.
1100
.
0000
.
0000---
00000.0000.0000.0000.0000---QDRII+_RL25
R1QAA36**C / R1QDA36**C Series
R1QAA3636CBB / R1QAA3618CBB
/ R1QAA3609CBB
R1QDA3636CBB / R1QDA3618CBB
/ R1QDA3609CBB
R1QGA3636CBB / R1QGA3618CBB / R1QGA3609CBB
R1QKA3636CBB / R1QKA3618CBB / R1QKA3609CBB
36-Mbit QDR™II+ SRAM
4-word Burst
Description
The R1Q#A3636 is a 1,048,576-word by 36-bit and the R1Q#A3618 is a 2,097,152-word by 18-bit synchronous
quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory
cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are controlled
by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are suitable
for applications which require synchronous operation, high speed, low voltage, high density and wide bit
configuration. These products are packaged in 165-pin plastic FBGA package.
#
= A: Read Latency =2.5, w/o ODT
#
= D: Read Latency =2.5, w/ ODT
# = G: Read Latency =2.0, w/o ODT
# = K: Read Latency =2.0, w/ ODT
R10DS0192EJ0010
Rev. 0.10b
2012.03.12
Features
Power Supply
• 1.8 V for core (V
DD
), 1.4 V to V
DD
for I/O (V
DDQ
)
Clock
• Fast clock cycle time for high bandwidth
• Two input clocks (K and /K) for precise DDR timing at clock rising edges only
• Two output echo clocks (CQ and /CQ) simplify data capture in high-speed systems
• Clock-stop capability with s restart
I/O
• Separate independent read and write data ports with concurrent transactions
• 100% bus utilization DDR read and write operation
• HSTL I/O
• User programmable output impedance
• DLL/PLL circuitry for wide output data valid window and future frequency scaling
• Data valid pin (QVLD) to indicate valid data on the output
Function
• Four-tick burst for reduced address frequency
• Internally self-timed write control
• Simple control logic for easy depth expansion
• JTAG 1149.1 compatible test access port
Package
• 165 FBGA package (13 x 15 x 1.4 mm)
Notes:
1.
QDR RAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress
Semiconductor, IDT, Samsung, and Renesas Electronics Corp. (QDR Co-Development Team)
2. The specifications of this device are subject to change without notice. Please contact your nearest
Renesas Electronics Sales Office regarding specifications.
3. Refer to
"http://www.renesas.com/products/memory/fast_sram/qdr_sram/qdr_sram_root.jsp"
for the latest and detailed information.
4. Descriptions about x9 parts in this datasheet are just for reference.
Rev. 0.10b : 2012.03.12
R10DS0192EJ0010
PAGE : 1
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