19-6338; Rev 0; 5/12
MAX14840PMB1 Peripheral Module
General Description
The MAX14840PMB1 peripheral module provides the
necessary hardware to interface the MAX14840E RS-485
transceiver to any system that utilizes Pmod
TM
-compatible
expansion ports configurable for a UART interface. The
IC is a +3.3V ESD-protected transceiver intended for
half-duplex RS-485 communication up to 40Mbps*. These
transceivers are optimized for high speeds over extended
cable runs, while maximizing tolerance to noise.
The IC features symmetrical fail-safe and larger receiver
hysteresis, providing improved noise rejection and
improved recovered signals in high-speed and long-
cable applications.
*The
maximum communication speed of this module
is generally less than 10Mbps due to the presence of
current-limiting resistors on the data lines of this module
and possibly also the host board.
Refer to the MAX14840E IC data sheet for detailed infor-
mation regarding operation of the IC.
S
Half-Duplex RS-485 Transceivers
S
40Mbps Maximum Data Rate
S
Large (170mV) Receiver Hysteresis
S
Symmetrical Fail-Safe Receiver Input
S
Hot-Swap Capability
S
Short-Circuit-Protected Outputs
S
Thermal Self-Protection
S
Extended ESD Protection for RS-485 I/O Pins
S
6-Pin Pmod-Compatible Connector (Pmod
Interface Type 4 UART)
S
Example Software Written in C for Portability
S
RoHS Compliant
S
Proven PCB Layout
S
Fully Assembled and Tested
Ordering Information
appears at end of data sheet.
Features
MAX14840PMB1 Peripheral Module
Pmod is a trademark of Digilent Inc.
_________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX14840PMB1 Peripheral Module
Component List
DESIGNATION
C1
QTY
1
DESCRIPTION
1FF
Q10%,
10V X7R ceramic
capacitor (0603)
TDK C1608X7R1A105K
0.1FF
Q10%,
16V X7R ceramic
capacitor (0603)
Murata GRM188R71C104KA01D
6-pin right-angle male header
2-position terminal block
On-Shore Technology
ED500/2DS
DESIGNATION
JP1
R1–R4
R5
U1
—
—
QTY
1
4
1
1
1
1
DESCRIPTION
2-pin straight male header
150I
Q5%
resistors (0603)
120I
Q5%
resistor (1206)
40Mbps, +3.3V, RS-485 half-
duplex transceiver (8 SO)
Maxim MAX14840EASA+
Shorting jumper
PCB: EPCB14840EPM1
C2
J1
J2
1
1
1
Component Suppliers
SUPPLIER
Murata Electronics North America, Inc.
On-Shore Technology, Inc.
TDK Corp.
PHONE
770-436-1300
480-921-3000
847-803-6100
WEBSITE
www.murata-northamerica.com
www.on-shore.com
www.component.tdk.com
Note:
Indicate that you are using the MAX14840PMB1 when contacting these component suppliers.
Detailed Description
The MAX14840PMB1 peripheral module can interface
to the host by plugging directly into a Pmod-compatible
port (configured for UART ) through connector J1.
Connector J1 provides connection of the module to the
Pmod host through an interface
similar
to the Pmod
UART Type 4 standard recommended by Digilent. The
transmit driver and receive pin assignment are the same
as the standard. However, the CTS and RTS signals
are replaced by half-duplex driver- and receiver-enable
signals. See Table 1.
Connector J2 provides the RS-485 positive and negative
signal pair. See Table 2.
Table 1. Connector J1 (UART Communication)
PIN
1
SIGNAL
RE
DESCRIPTION
Receiver-enable input. This active-low
pin enables the half-duplex receiver.
Driver input. This pin carries the transmit
data from the Pmod system’s UART
transmitter to a connected receiver.
Receiver output. This pin carries the
half-duplex receive data to the Pmod
system’s UART receiver.
Driver-output-enable input. This active-
high pin enables the half-duplex
transmitter.
Ground
Power supply
UART Interface
2
DI
3
RO
4
5
6
DE
GND
VCC
Table 2. Connector J2
PIN
1
2
SIGNAL
RS485-A
RS485-B
DESCRIPTION
Noninverting RS-485 signal
Inverting RS-485 signal
_________________________________________________________________
Maxim Integrated Products
2
MAX14840PMB1 Peripheral Module
Connector JP1 (Termination Select)
The software project (for the SDK) contains several
source files intended to accelerate customer evalu-
ation and design. These include a base application
(maximModules.c) that demonstrates module functionality,
and which uses an API interface (maximDeviceSpecific
Utilities.c) to set and access Maxim device functions within
a specific module.
The source code is written in standard ANSI C format, and
all API documentation including theory/operation, register
description, and function prototypes are documented in
the API interface file (maximDeviceSpecificUtilities.h & .c).
The complete software kit is available for download at
www.maxim-ic.com.
Quick start instructions are also
available as a separate document.
This jumper port optionally inserts a 120I termination
resistor across the transmit-positive and negative nets.
The JP1 jumper should be installed at the endpoints of
the RS-485 network, and not at the midpoints.
Example software and drivers are available that execute
directly without modification on several FPGA devel-
opment boards that support an integrated or synthe-
sized microprocessor. These boards include the Digilent
Nexys 3, Avnet LX9, and Avnet ZEDBoard, although
other platforms can be added over time. Maxim provides
complete Xilinx ISE projects containing HDL, Platform
Studio, and SDK projects. In addition, a synthesized bit
stream, ready for FPGA download, is provided for the
demonstration application.
Software and FPGA Code
VCC
C1
1uF
GND
J1
1
2
3
4
5
6
U1
RO
RE
DE
DI
VCC
C2
0.1uF
GND
RS485-B
1
2
VCC
B
A
GND
8
7
6
5
GND
VCC
R5
120
RS485-A
JP1
J2
1
2
R1
R2
R3
R4
150
150
150
150
RE
DI
RO
DE
1
2
3
4
A
B
GND
VCC
MAX14840E
Figure 1. MAX14840PMB1 Peripheral Module Schematic
Figure 2. MAX14840PMB1 Peripheral Module Component Placement Guide—Component Side
_________________________________________________________________
Maxim Integrated Products
3
MAX14840PMB1 Peripheral Module
Figure 3. MAX14840PMB1 Peripheral Module PCB Layout—Component Side
Figure 4. MAX14840PMB1 Peripheral Module PCB Layout—Inner Layer 1 (Ground)
Figure 5. MAX14840PMB1 Peripheral Module PCB Layout—Inner Layer 2 (Power)
_________________________________________________________________
Maxim Integrated Products
4
MAX14840PMB1 Peripheral Module
Figure 6. MAX14840PMB1 Peripheral Module PCB Layout—Solder Side
Figure 7. MAX14840PMB1 Peripheral Module Component Placement Guide—Solder Side
_________________________________________________________________
Maxim Integrated Products
5