Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Pulse Test: pulse width
≤
300
ms,
duty cycle
≤
2%.
3. Switching characteristics are independent of operating junction temperatures.
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2
NVJD5121N
TYPICAL PERFORMANCE CURVES
(T
J
= 25°C unless otherwise noted)
1.6
5V
I
D,
DRAIN CURRENT (A)
4.5 V
1.2
4.2 V
2.4 V
0.8
2.2 V
0.4
4V
3.8 V
3.6 V
3.4 V
3.2 V
3V
2.8 V
2.6 V
V
GS
= 10
T
J
= 25°C
I
D,
DRAIN CURRENT (A)
1.2
V
DS
≥
10 V
1
0.8
0.6
0.4
25°C
0.2
0
T
J
= 125°C
0
1
2
−55°C
3
4
5
0
0
1
2
3
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on),
DRAIN−TO−SOURCE RESISTANCE (W)
2.4
V
GS
= 4.5 V
2
1.6
1.2
0.8
0.4
0
0
0.2
0.4
0.6
0.8
1
I
D,
DRAIN CURRENT (A)
T
J
= 125°C
T
J
= 85°C
T
J
= 25°C
T
J
= −55°C
R
DS(on),
DRAIN−TO−SOURCE RESISTANCE (W)
2.4
2
1.6
1.2
0.8
0.4
0
0
Figure 2. Transfer Characteristics
V
GS
= 10 V
T
J
= 125°C
T
J
= 85°C
T
J
= 25°C
T
J
= −55°C
0.2
0.4
0.6
0.8
1
I
D,
DRAIN CURRENT (A)
R
DS(on),
DRAIN−TO−SOURCE RESISTANCE (W)
Figure 3. On−Resistance vs. Drain Current and
Temperature
2.4
I
D
= 500 mA
R
DS(on),
DRAIN−TO−SOURCE
RESISTANCE (NORMALIZED)
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
Figure 4. On−Resistance vs. Drain Current and
Temperature
V
GS
= 10 V
I
D
= 0.5 A
2
1.6
4.5 V
1.2
I
D
= 200 mA
10 V
0.8
2
4
6
8
10
V
GS
, GATE−TO−SOURCE VOLTAGE (V)
0.6
−50
−25
0
25
50
75
100
125
150 175
T
J
, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance versus
Gate−to−Source Voltage
Figure 6. On−Resistance Variation with
Temperature
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3
NVJD5121N
TYPICAL PERFORMANCE CURVES
(T
J
= 25°C unless otherwise noted)
T
J
= 25°C
V
GS
= 0 V
C, CAPACITANCE (pF)
30
C
iss
V
GS,
GATE−TO−SOURCE VOLTAGE (V)
40
5
I
D
= 0.2 A
T
J
= 25°C
V
DD
= 25 V
4
3
20
2
10
C
oss
C
rss
1
0
0
4
8
12
16
20
0
0
0.2
0.4
0.6
0.8
1
DRAIN−TO−SOURCE VOLTAGE (V)
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1
V
GS
= 0 V
I
S
, SOURCE CURRENT (A)
0.1
T
J
= 85°C
T
J
= 25°C
0.01
0.4
0.6
0.8
1
1.2
V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Diode Forward Voltage vs. Current
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4
NVJD5121N
PACKAGE DIMENSIONS
2X
SC−88/SC70−6/SOT−363
CASE 419B−02
ISSUE Y
aaa H D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-
SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.
4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF
THE PLASTIC BODY AND DATUM H.
5. DATUMS A AND B ARE DETERMINED AT DATUM H.
6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE
LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.
7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.
ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN
EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-
TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER
RADIUS OF THE FOOT.
DIM
A
A1
A2
b
C
D
E
E1
e
L
L2
aaa
bbb
ccc
ddd
MILLIMETERS
MIN
NOM MAX
−−−
−−−
1.10
0.00
−−−
0.10
0.70
0.90
1.00
0.15
0.20
0.25
0.08
0.15
0.22
1.80
2.00
2.20
2.00
2.10
2.20
1.15
1.25
1.35
0.65 BSC
0.26
0.36
0.46
0.15 BSC
0.15
0.30
0.10
0.10
INCHES
NOM MAX
−−− 0.043
−−− 0.004
0.035 0.039
0.008 0.010
0.006 0.009
0.078 0.086
0.082 0.086
0.049 0.053
0.026 BSC
0.010 0.014 0.018
0.006 BSC
0.006
0.012
0.004
0.004
MIN
−−−
0.000
0.027
0.006
0.003
0.070
0.078
0.045
D
A
D
5
4
H
GAGE
PLANE
6
L2
E
1
2X
2
3
L
DETAIL A
E1
aaa C
bbb H D
2X 3 TIPS
e
B
TOP VIEW
6X
b
ddd
M
C A-B D
A2
A
DETAIL A
6X
ccc C
SIDE VIEW
A1
C
SEATING
PLANE
c
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
6X
STYLE 26:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
0.30
6X
0.66
2.50
0.65
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
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