EEWORLDEEWORLDEEWORLD

Part Number

Search

25G324E-80N-50.000

Description
CMOS/TTL Output Clock Oscillator, 50MHz Nom, ROHS COMPLIANT, ULTRA MINIATURE, SMD, 4 PIN
CategoryPassive components    oscillator   
File Size110KB,2 Pages
ManufacturerEuroquartz
Websitehttp://www.euroquartz.co.uk/
Environmental Compliance
Download Datasheet Parametric View All

25G324E-80N-50.000 Overview

CMOS/TTL Output Clock Oscillator, 50MHz Nom, ROHS COMPLIANT, ULTRA MINIATURE, SMD, 4 PIN

25G324E-80N-50.000 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instructionROHS COMPLIANT, ULTRA MINIATURE, SMD, 4 PIN
Reach Compliance Codecompli
Other featuresSYMMETRY 55/45 ALSO AVAILABLE
Maximum control voltage2.25 V
Minimum control voltage0.25 V
maximum descent time6 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate80 ppm
frequency stability50%
linearity10%
Installation featuresSURFACE MOUNT
Nominal operating frequency50 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS/TTL
Output load2 TTL, 15 pF
physical size3.2mm x 2.5mm x 0.95mm
longest rise time6 ns
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry60/40 %
Base Number Matches1
EURO
QUARTZ
3.2 x 2.5 x 0.9mm 4 pad SMD
Ultra-miniature 4 pad SMD package
Frequency range 16.0MHz to 50.0MHz
CMOS/TTL Output
Supply Voltage 1.8, 2.5, 3.3 or 5.0VDC
Integrated Phase Jitter 1ps maximum
DESCRIPTION & APPLICATIONS
G324 VCXOs are packaged in an ultra-miniature 3.2 x 2.5 x 0.9mm 4
pad SMD package. G series VCXOs use fundamental mode crystal
oscillators for low phase noise. Applications include phase lock loop,
SONET/ATM, set-top boxes, MPEG , audio/video modulation, video
game consoles, Fibre Channel, FPGAs, Data Acquisition and HDTV.
SUPPLY VOLTAGE-DEPENDANT SPECIFICATION
Input Voltage (Vdd):
Frequency Range*:
Output Waveform:
Initial Frequency Accuracy:
TTL:
Output Logic HIGH '1'
CMOS:
TTL:
Output Logic LOW '0'
Frequency Deviation Range:
Control Voltage Centre
Control Voltage Range:
CMOS:
G324 VCXO
625.0kHz ~ 50.0MHz
Page 1 of 2
Vdd = +1.8VDC ±5% Vdd = +2.5VDC ±5% Vdd = +3.3VDC ±5% Vdd = +5.0VDC ±10%
16.0MHz ~ 50.0MHz
TTL/CMOS
To tune to nominal fr.
with Vc=0.9±0.15V
----
1.62V (min.)
----
0.183V (max.)
Standard: ±80ppm
(min.)
0.9VDC
0V to 1.8V
0.625MHz ~ 50.0MHz
TTL/CMOS
To tune to nominal fr.
with Vc=1.25±0.2V
----
2.25V (min.)
----
0.25V (max.)
Standard: ±80ppm
(min.)
1.25VDC
025V to 2.25V
0.625MHz ~ 50.0MHz
TTL/CMOS
To tune to nominal fr.
with Vc=1.65±0.2V
2.4V (min.)
2.97V (min.)
0.4V (max.)
0.33 (max.)
Standard: ±80ppm
(min.)
1.62VDC
0.3V to 3.0V
1.0MHz ~ 50.0MHz
TTL/CMOS
To tune to nominal fr.
with Vc=2.5±0.2V
2.4V (min.)
4.5V (min.)
0.4V (max.)
0.5V (max.)
Std: ±80ppm (min.)
±200ppm available
2.5VDC
0.5V to 1.5V
GENERAL SPECIFICATION
Frequency Stability:
Frequency Change
vs. Input Voltage:
Input Voltage:
Output Load
TTL:
CMOS:
Rise/Fall Time
TTL:
CMOS:
Duty Cycle:
Integrated Phase Jitter:
Period Jitter RMS:
Period Jitter Peak to Peak:
Start-up time:
Current Consumption:
6ns max, 4ns typ. (0.4V to 2.4V)
6ns max, 4ns typ. (20%~80% Vdd)
50±10% standard, 50±5% option
1ps maximum (12kHz to 20MHz)
2.0ps typical
14ps
10ms max., 3ms typical
10 to 45mA, frequency dependant
(27MHz: 10mA typical at 3.3V,
20mA typical at 5.0VDC)
6% typical, 10% maximum
10kHz min., measured at Vcont =
1.65V or2.5V.
1MΩ typical
Monotonic and Positive, increasing
control voltage increases output
frequency.
±3ppm per year maximum
RoHS Compliant and lead (Pb) free
2TTL gates
15pF
OUTLINE & DIMENSIONS
±5ppm max. (V
DD
±5%)
+1.8V±5%, +2.5V±5%,
+3.3V±5% or 5.0V±10%
Linearity:
Modulation Bandwidth:
Input Impedance:
Slope Polarity:
Ageing:
RoHS Status:
EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE
Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001 info@euroquartz.co.uk www.euroquartz.co.uk
STM32 high-speed USB signal quality test [ST official application note]
Note Preview [b]Implementation of STM32's high-speed USB signal quality test [/b] [b]Preface [/b] STM32 provides a wealth of interface resources, including USB FS, USB HS, OTG FS and OTG HS. For high-...
okhxyyo stm32/stm8
LSM6DSL (accelerometer + gyroscope) driver example ver1.8
[align=left][font=Calibri, sans-serif][size=2][color=#000000]On the ST official website, the LSM6DSL data sheet has been updated to rev6.0, and the corresponding application manual AN5040 is provided,...
谍纸天眼 MEMS sensors
[Low Power] Low-Power Routing Algorithm for Programmable Logic Arrays to Reduce Glitches
With the increasing popularity of field programmable gate array (FPGA) applications and the emergence of portable and wireless devices, the speed, single chip capacity, cost and reliability of FPGAs i...
cillyfly FPGA/CPLD
FPGA giant Xilinx adjusts strategy to expand market
With Altera launching FPGAs with 65nm process, the world's two largest FPGA giants have started a new round of competition at the 65nm node. However, recently, Zheng Xinnan, marketing director of Xili...
frozenviolet Automotive Electronics
Array definition in SRAM
How do I define an array in an external SRAM? Can you please give me a simple program code for the definition? Thank you...
小喇叭 Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1913  663  1140  1150  1748  39  14  23  24  36 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号