EEWORLDEEWORLDEEWORLD

Part Number

Search

B41042A4567M002

Description
CAPACITOR, ALUMINUM ELECTROLYTIC, NON SOLID, NON-POLARIZED, 16V, 560uF, THROUGH HOLE MOUNT, RADIAL LEADED, ROHS COMPLIANT
CategoryPassive components    capacitor   
File Size296KB,23 Pages
ManufacturerEPCOS (TDK)
Environmental Compliance  
Download Datasheet Parametric View All

B41042A4567M002 Overview

CAPACITOR, ALUMINUM ELECTROLYTIC, NON SOLID, NON-POLARIZED, 16V, 560uF, THROUGH HOLE MOUNT, RADIAL LEADED, ROHS COMPLIANT

B41042A4567M002 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
package instruction,
Reach Compliance Codecompliant
ECCN codeEAR99
capacitance560 µF
Capacitor typeALUMINUM ELECTROLYTIC CAPACITOR
dielectric materialsALUMINUM (WET)
JESD-609 codee3
leakage current0.2688 mA
Manufacturer's serial numberB41042
Installation featuresTHROUGH HOLE MOUNT
negative tolerance20%
Number of terminals2
Maximum operating temperature105 °C
Minimum operating temperature-55 °C
Package shapeCYLINDRICAL PACKAGE
method of packingBULK
polarityNON-POLARIZED
positive tolerance20%
Rated (DC) voltage (URdc)16 V
ripple current763.2 mA
surface mountNO
Delta tangent0.16
Terminal surfaceMatte Tin (Sn)
Terminal shapeWIRE
Single-ended
Aluminum electrolytic capacitors
Series/Type:
B41042
The following products presented in this data sheet are being withdrawn.
Ordering Code
B41042*
Substitute Product
Date of Withdrawal
2013-02-22
Deadline Last Orders
2013-09-30
Last Shipments
2014-03-31
For further information please contact your nearest EPCOS sales office, which will also support you in selecting a suitable substitute. The
addresses of our worldwide sales network are presented at www.epcos.com/sales.
A fully digital phase-locked loop design under large frequency deviation and low signal-to-noise ratio conditions
A fully digital phase-locked loop design under large frequency deviation and low signal-to-noise ratio conditions...
雷北城 FPGA/CPLD
Embedded fingerprint recognition system
Has anyone done embedded fingerprint recognition? Can you send the relevant information to my email address collegeml@gmail.com? I have searched the Internet for a long time but have no clue. Thank yo...
slevin Embedded System
EEWORLD University Hall ---- Learn HLS with me
Learn HLS with me : https://training.eeworld.com.cn/course/4854This series of teaching videos is led by Xilinx senior strategic application engineers to guide you from scratch, step by step to master ...
抛砖引玉 FPGA/CPLD
The ip core generates RAM, perfect simulation, but there are still some small details I would like to ask the masters
[i=s] This post was last edited by 调戏、和尚/ on 2015-7-29 20:43 [/i] [postbg]bg8.png[/postbg][size=3][b]Single-port RAM 1024*8 size generated by IP core[/b][/size] The simulation diagram has come out, it...
调戏、和尚/ FPGA/CPLD
Unpack and evaluate to win prizes - you are just one unpacking away from truly owning it!
[font=微软雅黑][size=3]What have you taken apart recently? Why? To repair? To modify? [/size][/font][font=微软雅黑][size=3]Or just to take it apart to find out what it is, and to improve your own hands-on ski...
eric_wang Making friends through disassembly
Please introduce the specific model of DSP
Please introduce the specific model of DSPMy requirements are as follows: 1. Main frequency 50M+; 2. ADC channels 8+, accuracy 8-12 bits (preferably adjustable, like MSP430), internal resistance shoul...
shushu DSP and ARM Processors

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2881  2005  899  1047  1470  59  41  19  22  30 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号