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NCAA4700CMMAKWS

Description
CAP,SILICON,4.7PF,20% -TOL,20% +TOL,15PPM TC
CategoryPassive components    capacitor   
File Size81KB,4 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric View All

NCAA4700CMMAKWS Overview

CAP,SILICON,4.7PF,20% -TOL,20% +TOL,15PPM TC

NCAA4700CMMAKWS Parametric

Parameter NameAttribute value
package instruction, 0202
Reach Compliance Codeunknown
ECCN codeEAR99
capacitance0.0000047 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
high0.25 mm
length0.508 mm
Manufacturer's serial numberNCSERIES
negative tolerance20%
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package formSMT
method of packingWaffle Pack
positive tolerance20%
seriesNC SERIES
size code0202
Temperature Coefficient15% ppm/°C
width0.508 mm
NC Series
Vishay Electro-Films
Thin Film Single Value
Chip and Wire Capacitors
FEATURES
Product may not
be to scale
Wire bondable
Small size: 0.020 inches square to 0.060 inches square
Substrate: Silicon with gold backing
Dielectric: Silicon dioxide/silicon nitride
Capacitance range: 0.5 pF to 1000 pF
The NC series of thin film capacitors has the advantage of
increased performance and smaller size when compared
with its thick film counterparts. These chips are available in
sizes down to 20 mil square and in capacitances up to
1000 pF.
Parts require epoxy or eutectic die attach to substrate and
one wire bond.
These chips are manufactured using Vishay Electro-Films
(EFI) sophisticated Thin Film equipment and manufacturing
technology. The NC’s are 100 % electrically tested and
visually inspected to MIL-STD-883.
CHIP
CAPACITORS
APPLICATIONS
The NC series of capacitor chips are designed for assembly in hybrid circuits using conventional wire-bonding techniques. They
provide excellent stability and performance, and their small size gives the hybrid designer greater layout flexibility. They are
available as MNOS or MOS capacitors. The MOS version is to be preferred when low dielectric absorption is required.
ELECTRICAL SCHEMATIC
NCAA/NCBB/NCCC
TOP BONDING PADS
ELECTRICAL SCHEMATIC
NCDD/NCEE
TOP BONDING PADS
BACK OF CHIP
BACK OF CHIP
STANDARD ELECTRICAL SPECIFICATIONS
PARAMETER
Peak Voltage at + 25 °C
Dissipation Factor, 1 kHz, 1 V
RMS
, + 25 °C
Q at 1 mHz, 50 mV
RMS
, + 25 °C
TCC, - 55 °C to + 150 °C
Insulation Resistance at Working Voltage, + 25 °C
Operating Temperature Range
Thermal Shock
Moisture Resistance, MIL-STD-202, Method 106
Short Time Overload, + 25 °C, 5 s, 1.5 x Working Voltage
High Temperature Exposure, 100 h at 150 °C Ambient
Life, MIL-STD-202, Method 108
Condition D, + 125 °C Ambient, 100 h at Working Voltage
1.5 x working voltage
0.05 % MNOS
0.1 % MOS
1000 min.
+ 45 ± 25 ppm/°C MNOS
+ 15 ± 25 ppm/°C MOS
10
9
min.
- 55 °C to + 125 °C
± 0.25 % + 0.25 pF max.
ΔC/C
± 1.0 % + 0.25 pF max.
ΔC/C
± 0.25 % + 0.25 pF max.
± 0.25 % + 0.25 pF max.
ΔC/C
± 0.25 % + 0.25 pF max.
ΔC/C
Document Number: 61033
Revision: 25-Feb-10
For technical questions, contact:
efi@vishay.com
www.vishay.com
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