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LTC2261-12_15

Description
12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs
File Size1MB,34 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
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LTC2261-12_15 Overview

12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs

LTC2261-12
LTC2260-12/LTC2259-12
12-Bit, 125/105/80Msps
Ultralow Power 1.8V ADCs
FeaTures
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DescripTion
The
LTC
®
2261-12/LTC2260-12/LTC2259-12
are sam-
pling 12-bit A/D converters designed for digitizing high
frequency, wide dynamic range signals. They are perfect
for demanding communications applications with AC
performance that includes 70.8dB SNR and 85dB spurious
free dynamic range (SFDR). Ultralow jitter of 0.17ps
RMS
allows undersampling of IF frequencies with excellent
noise performance.
DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL
(typical) and no missing codes over temperature. The
transition noise is a low 0.3LSB
RMS
.
The digital outputs can be either full-rate CMOS, double-
data rate CMOS, or double-data rate LVDS. A separate
output power supply allows the CMOS output swing to
range from 1.2V to 1.8V.
The ENC
+
and ENC
inputs may be driven differentially or
single ended with a sine wave, PECL, LVDS, TTL or CMOS
inputs. An optional clock duty cycle stabilizer allows high
performance at full speed for a wide range of clock duty
cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
70.8dB SNR
85dB SFDR
Low Power: 124mW/103mW/87mW
Single 1.8V Supply
CMOS, DDR CMOS or DDR LVDS Outputs
Selectable Input Ranges: 1V
P-P
to 2V
P-P
800MHz Full-Power Bandwidth S/H
Optional Data Output Randomizer
Optional Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Serial SPI Port for Configuration
Pin Compatible 14-Bit and 12-Bit Versions
40-Pin (6mm
×
6mm) QFN Package
applicaTions
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Communications
Cellular Base Stations
Software Defined Radios
Portable Medical Imaging
Multi-Channel Data Acquisition
Nondestructive Testing
Typical applicaTion
1.8V
V
DD
1.2V
TO 1.8V
OV
DD
2-Tone FFT, f
IN
= 70MHz and 75MHz
0
–10
–20
–30
AMPLITUDE (dBFS)
–40
–50
–60
–70
–80
ANALOG
INPUT
+
INPUT
S/H
12-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC
OUTPUT
DRIVERS
D11
CMOS
OR
LVDS
D0
OGND
CLOCK/DUTY
CYCLE
CONTROL
125MHz
CLOCK
GND
226112 TA01a
–90
–100
–110
–120
0
10
20
30
40
FREQUENCY (MHz)
50
60
226112 TA01b
226112fc
For more information
www.linear.com/LTC2261-12
1

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LTC2261-12_15 LTC2259-12_15 LTC2260-12_15
Description 12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs 12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs 12-Bit, 125/105/80Msps Ultralow Power 1.8V ADCs
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