TSM4N70
Taiwan Semiconductor
N-Channel Power MOSFET
700V, 3.5A, 3.3Ω
FEATURES
●
●
●
●
High power and current handling capability
Pb-free plating
RoHS compliant
Halogen-free mold compound
KEY PERFORMANCE PARAMETERS
PARAMETER
V
DS
R
DS(on)
(max)
Q
g
VALUE
700
3.3
14
UNIT
V
Ω
nC
APPLICATION
●
●
Power Supply
Lighting
TO-251
(IPAK)
TO-252
(DPAK)
ITO-220
Notes:
Moisture sensitivity level: level 3. Per J-STD-020
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current
(Note 1)
SYMBOL
V
DS
V
GS
T
C
= 25°C
T
C
= 100°C
I
D
I
DM
P
DTOT
E
AS
I
AS
T
J
, T
STG
(Note 3)
(Note 3)
LIMIT
ITO-220
IPAK/DPAK
700
±30
2
1.3
8
38
43
3.5
- 55 to +150
3.5
1.6
14
56
UNIT
V
V
A
A
W
mJ
A
°C
(Note 2)
Total Power Dissipation @ T
C
= 25°C
Single Pulsed Avalanche Energy
Single Pulsed Avalanche Current
Operating Junction and Storage Temperature Range
THERMAL PERFORMANCE
PARAMETER
Junction to Case Thermal Resistance
Junction to Ambient Thermal Resistance
SYMBOL
R
ӨJC
R
ӨJA
LIMIT
ITO-220
3.6
62
IPAK/DPAK
2.2
50
UNIT
°C/W
°C/W
Notes:
R
ӨJA
is the sum of the junction-to-case and case-to-ambient thermal resistances. The case thermal reference is defined
at the solder mounting surface of the drain pins. R
ӨJA
is guaranteed by design while R
ӨCA
is determined by the user’s board
design. R
ӨJA
shown below for single device operation on FR-4 PCB in still air
Document Number: DS_P0000167
1
Version: A15
TSM4N70
Taiwan Semiconductor
ELECTRICAL SPECIFICATIONS
(T
A
= 25°C unless otherwise noted)
PARAMETER
Static
(Note 4)
CONDITIONS
V
GS
= 0V, I
D
= 250µA
V
DS
= V
GS
, I
D
= 250µA
V
GS
= ±30V, V
DS
= 0V
V
DS
= 700V, V
GS
= 0V
V
GS
= 10V, I
D
= 2A
SYMBOL
BV
DSS
V
GS(TH)
I
GSS
I
DSS
R
DS(on)
MIN
TYP
MAX
UNIT
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Body Leakage
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
Dynamic
(Note 5)
700
2
--
--
--
--
--
--
--
2.5
--
4
±100
25
3.3
V
V
nA
µA
Ω
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
(Note 6)
V
DS
= 480V, I
D
= 4A,
V
GS
= 10V
Q
g
Q
gs
Q
gd
C
iss
--
--
--
--
--
--
14
3
6
595
80
20
--
--
--
--
--
--
pF
nC
V
DS
= 25V, V
GS
= 0V,
f = 1.0MHz
C
oss
C
rss
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Source-Drain Diode
Forward On Voltage
Notes:
1.
2.
3.
4.
5.
6.
Current limited by package
Pulse width limited by the maximum junction temperature
L = 7mH, I
AS
= 3.5A, V
DD
= 50V, R
G
= 25Ω, Starting T
J
= 25 C
Pulse test: PW ≤ 300µs, duty cycle ≤ 2%
For DESIGN AID ONLY, not subject to production testing.
Switching time is essentially independent of operating temperature.
o
t
d(on)
V
DD
= 300V,
R
GEN
= 25Ω,
I
D
= 4A, V
GS
= 10V,
(Note 4)
--
--
--
--
18
17
40.5
19
--
--
--
--
ns
t
r
t
d(off)
t
f
I
S
= 2.5A, V
GS
= 0V
V
SD
--
--
1.5
V
Document Number: DS_P0000167
2
Version: A15
TSM4N70
Taiwan Semiconductor
ORDERING INFORMATION
PART NO.
TSM4N70CI C0G
TSM4N70CH C5G
TSM4N70CP ROG
PACKAGE
ITO-220
TO-251 (IPAK)
TO-252 (DPAK)
PACKING
50pcs / Tube
75pcs / Tube
2,500pcs / 13” Reel
Note:
1. Compliant to RoHS Directive 2011/65/EU and in accordance to WEEE 2002/96/EC
2. Halogen-free according to IEC 61249-2-21 definition
Document Number: DS_P0000167
3
Version: A15
TSM4N70
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Output Characteristics
Transfer Characteristics
Normalized Vth vs. Junction Temperature
Gate Charge
On-Resistance Variation vs. Temperature
Maximum Safe Operating Area (ITO-220)
Document Number: DS_P0000167
4
Version: A15
TSM4N70
Taiwan Semiconductor
CHARACTERISTICS CURVES
(T
C
= 25°C unless otherwise noted)
Maximum Safe Operating Area (DPAK,IPAK)
Normalized Thermal Transient Impedance Curve (ITO-220)
Normalized Thermal Transient Impedance Curve (DPAK,IPAK)
Document Number: DS_P0000167
5
Version: A15
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