Evaluation Board for
Filterless Class-D Audio Amplifier
EVAL-SSM2301
FEATURES
Highly configurable DIP switch settings: gain adjustment,
input configuration, and shutdown control
Optional dc power supply jack (accepts 2.5 V to 5 V)
Single-ended and differential input capability
Multiple output interface connection terminals
GENERAL DESCRIPTION
The
SSM2301
is a single-chip, single-channel, Class-D audio
amplifier. It is a fully integrated chip, which means that the
application circuit requires a minimum of external components.
It comes with a differential mode input port and a high efficiency
H-bridge at the output. When compared to a half-bridge output
stage, a full H-bridge enables direct coupling of the audio power
signal to the loudspeaker, doubling the output voltage swing and
eliminating the need for a large output coupling capacitor. Another
benefit of a full H-bridge is an increase of the maximum output
power by 4× when compared to a half bridge under the same
load impedance. These benefits are particularly useful for low
voltage, battery-powered portable electronics where energy and
space are limited. The differential mode input stage allows for
cancelling of common-mode noise leading to a superior CMRR.
Moreover, the part features a high efficiency, low noise output
modulation scheme that does not require external LC output
filters when attached to an inductive load. The modulation
provides high efficiency even at low output power. Filterless
operation also helps to decrease distortion due to nonlinearities
of output LC filters, thereby having a better sound quality and
leading to savings in board space and overall cost.
This data sheet describes how to configure and use the SSM2301
evaluation board. It is recommended that this data sheet be
read in conjunction with the SSM2301 data sheet, which
provides more detailed information about the specifications,
internal block diagrams, and application guidance for the
amplifier IC.
EVALUATION BOARD DESCRIPTION
The
SSM2301
evaluation board carries a complete application
circuit for driving one loudspeaker. Figure 1 shows the top view
of the PCB and Figure 2 shows the typical setup of the evaluation
board while in operation. Figure 8 shows its layout. The bottom
layer of the evaluation board is shown in Figure 9, and its
mirrored version is shown in Figure 10. The schematic is
shown in Figure 7. The bill of materials is given in Table 1.
07108-009
Figure 1. SSM2301 Evaluation Board
Figure 2. SSM2301 Evaluation Board Typical Setup
Rev. 0
Evaluation boards are only intended for device evaluation and not for production purposes.
Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or
statutory including, but not limited to, any implied warranty of merchantability or fitness for a
particular purpose. No license is granted by implication or otherwise under any patents or other
intellectual property by application or use of evaluation boards. Information furnished by Analog
Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may
result from its use. Analog Devices reserves the right to change devices or specifications at any
time without notice. Trademarks and registered trademarks are the property of their respective
owners. Evaluation boards are not authorized to be used in life support devices or systems.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
www.analog.com
Tel: 781.329.4700
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.
07108-010
EVAL-SSM2301
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Evaluation Board Description......................................................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Switches.......................................................................................... 3
Getting Started .............................................................................. 3
Layout Guidelines..........................................................................4
Evaluation Board Schematic and Artwork.....................................5
Ordering Information .......................................................................7
Bill of Materials ..............................................................................7
Ordering Guide .............................................................................7
ESD Caution...................................................................................7
REVISION HISTORY
5/08—Revision 0: Initial Version
Rev. 0 | Page 2 of 8
EVAL-SSM2301
EVALUATION BOARD HARDWARE
Note that the SSM2301 evaluation board and layout guidelines
were developed by Gang Liu of Analog Technologies, Inc.,
Sunnyvale, CA.
•
•
S1B
The same functions as the S1A switch but for the coupling
capacitor connected to the negative input port.
S1C
Upper position: short circuits the ac signal on the negative
input port to ground. This function is only needed when
driving the input port in single-ended mode, such as by
using the audio jack.
Lower position: differential input.
S1D (marked with GAIN)
Upper position: For controlling the gain, short circuits the
GAIN pin to ground, setting the amplifier to a lower gain,
6 dB.
Lower position: sets the amplifier to a higher gain, 12 dB.
S1E (marked with SD)
Upper position: shuts down the amplifier for the shutdown
functions.
Lower position: activates the amplifier.
SWITCHES
On the upper left corner of the evaluation board is an audio
stereo jack connector (3.5 mm), J1. It accepts standard stereo
audio signals by using a conventional audio stereo signal
connector/cable to receive audio signals from common
appliances such as DVD players, personal computers, and TVs.
Note that the two output signals from the J1 connector are
combined by a resistor network, R1 and R2, into a single signal.
When this input connector is utilized, turn the switch, S1C, to
the upper position to short circuit the negative input node to
ground, essentially creating a single-ended input signal. S1C, in
the upper position, blocks any interference shown on this
floating node. This signal path is shown in the schematic in
Figure 7. Some appliances may have strong ground noise. In the
event that the audio source has strong ground noise, do not use
the J1 connector as the input connection point. A single-ended
input signal with strong ground noise generates an audible
hissing sound at the output. When this happens, differential
mode connection is needed and the ground noise interference
can be cancelled.
The input signal can be connected in a differential mode using
the HD1 (Header 1) connector or the solder pads on the left
side of the board. Note that the S1C switch should be turned off
(placed in the lower position) for differential input mode. See
Figure 7 and Figure 8. The solder pads on the left edge of the
board can conveniently be connected by using alligator clips.
Figure 3 shows such a connection: the ground on the signal
source appliance is sensed by a dedicated cable wire in addition
to the ground connection wire.
TWIST OR SHIELD
OUTPUT
SIGNAL
SOURCE
GND
GND
INPUT+
INPUT–
GND
EVALUATION
BOARD
•
•
The upper right corner of the SSM2301 evaluation board has a
dc power jack connector. The center pin is for the positive
terminal. The SSM2301 can operate from 2.5 V to 5 V supply
voltage. The maximum peak current is approximately 0.6 A
when driving an 8 Ω load with a 5 V supply. The SSM2301
evaluation board also has two solder pads in the upper center
edge area for connecting the power supply voltages by clipping
with alligator clips or soldering wires.
The output ports are located on the right side of the board.
There are three options to connect the output ports to a load:
screw terminal (TB1), header (HD3), or the soldering pads on
the right edge of the board. Header HD4, which is also on the
right side of the board, is solely a ground connection point and
not associated with load connection to the output (see Figure 7
and Figure 8).
GETTING STARTED
To ensure proper operation, follow these steps carefully.
07108-005
1.
Verify that the control switches are set at the proper positions.
•
•
•
•
Shutdown control: S1E down. This activates the
amplifier.
Gain setting: S1D. Select the position based on the
gain needed.
Audio source: S1C. For single-ended mode (audio
jack), be sure to put S1C in the upper position.
Input coupling: S1A/S1B. For most applications, ac
couple the inputs by setting these switches in the
lower position.
Figure 3. Cancelling Ground Noise by Differential Input Mode
The SSM2301 evaluation board has two ground soldering pads
on the lower left corner. They can be used for connection to the
ground of the signal source, as indicated in Figure 3.
The lower side of the board has a switch bank with the follow-
ing functions:
•
S1A
Upper position: short circuits the input coupling capacitor
for positive input port.
Lower position: open circuits the input coupling capacitor
for positive input port.
2.
3.
Connect load across output ports.
Connect the power supply with the correct polarity and
proper voltage.
Rev. 0 | Page 3 of 8
EVAL-SSM2301
LAYOUT GUIDELINES
1.
Place at least nine vias on the solder pad for the thermal
pad of the amplifier for proper conduction of heat to the
opposite side of the board. The outer diameter of the vias
should be 0.5 mm and the inner diameter should be 0.25 mm
to 0.3 mm. Use a PCB area of at least 2 cm
2
equivalent area
on the opposite side of the layer of the amplifier chip as a
heat sink. Also, extend the ground pad (for the thermal
pad) as much as possible on the amplifier side of the PCB
as a heat sink (see Figure 4). If internal layers are available,
allocate a certain area as a heat sink; make sure to connect the
vias conducting the heat to the internal layers.
TOP LAYER
SMALL
INDUCTOR
INPUT
TRACK
C8
C10
C13
OUTPUT
TRACK
COPPER
FILL
Figure 5. Placement and Routing for Decoupling Capacitors
4.
Figure 4. Heat Sink Layout
2.
3.
Place the EMI filtering beads, B1, B2 and B3, as close to the
amplifier chip as possible.
Place the decoupling capacitors for the beads, C8, C9, and
C12, as close to the amplifier chip as possible, and connect
all their ground terminals together as close as possible.
Ideally, solder their ground terminals together, as shown in
Figure 5; do not rely on PCB tracks or ground planes for
connecting their ground terminals together.
07108-006
INTERNAL
AND/OR
BOTTOM LAYER
5.
6.
The 1 nF capacitor and the ferrite bead can block the EMI
for up to 250 MHz. To eliminate EMI higher than 250 MHz,
place a low value small size capacitor, such as a 100 pF, 0402
size capacitor, in parallel with the 1 nF decoupling capacitor.
Place this small capacitor a short distance away from the
1 nF capacitor and use the PCB connection track as an
inductor to form a PI shape low-pass filter, as shown in
Figure 5.
If implementing a PCB track PI filter, the arriving input
PCB track and the leaving output PCB track connection to
the decoupling capacitor should not be connected. The
correct layout example is shown in Figure 5. The incorrect
layout is shown in Figure 6.
Decouple the input port nodes with small capacitors, such
as a 100 pF C3 and a 100 pF C4. They are not necessary but
can lower the input EMI.
C8
C10
C13
INPUT
TRACK
OUTPUT
TRACK
Figure 6. Wrong Routing for the Inductive Track Output Decoupling
Capacitor
Rev. 0 | Page 4 of 8
07108-008
C12
C9
C11
07108-007
C12
C9
C11
EVAL-SSM2301
EVALUATION BOARD SCHEMATIC AND ARTWORK
1
1
C6
1nF
C7
1nF
S1E
2
1
IN+
IN–
GND
GND
1
1
1
1
1
HD1
3
2
1
8
S1C
5PDT
3
2
5PDT
C2
220nF
1
2
9
2
1
C3
100pF
2
1
C4
100pF
2
1
S1B
5PDT
C1
220nF
1
2
10
S1A
R1
2kΩ
2
1
R2
2kΩ
5
5PDT
S1D
4
5PDT
7
R3
1 100Ω 2
R4
1 100Ω 2
2
GAIN
IN+
IN–
PAD
9
6
1
SD
OUT–
GND
VDD
OUT+
8
7
R6
1 100kΩ 2
R7
1 100kΩ 2
VDD
2
1
L1
2
1
4
2
C8 2
1nF 1
C9 1
1nF 2
C10
100pF
C11
100pF
3
2
1
1
1
1
1
VDD
1
2
2
1
C13
10µF
3
2
1
HD2
TB1
HD3
OUT+
OUT–
1
2
J1
AUDIO JACKET
2
3
1
1
2
1
2
3.3µH
(NO_POP)
1
B1
HD4
BLM18EG221SN1
2
1
3
4
SSM2301
U1
6
5
1
B2
2
1
2
GND
GND
GND
PGND
BLM18EG221SN1
1
L2
2
3.3µH
(NO_POP)
BLM18EG221SN1
1
2
B3
C12
10µF
J2
PS_JACK
07108-004
Figure 7. Schematic of SSM2301 Evaluation Board (Rev. 2.0)
Rev. 0 | Page 5 of 8
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