Datasheet
RMQS2A1836DGBA, RMQS2A1818DGBA
18-Mbit QDR™ II SRAM
2-word Burst
Description
The RMQS2A1836DGBA is a 524,288-word by 36-bit and the RMQS2A1818DGBA is a 1,048,576-word by 18-bit
synchronous quad data rate static RAM fabricated with advanced CMOS technology using full CMOS six-transistor
memory cell. It integrates unique synchronous peripheral circuitry and a burst counter. All input registers are
controlled by an input clock pair (K and /K) and are latched on the positive edge of K and /K. These products are
suitable for applications which require synchronous operation, high speed, low voltage, high density and wide bit
configuration. These products are packaged in 165-pin plastic FBGA package.
R10DS0246EJ0100
Rev.1.00
Jan.13, 2015
Features
Power Supply
1.8 V for core (V
DD
), 1.4 V to V
DD
for I/O (V
DDQ
)
Clock
Fast clock cycle time for high bandwidth
Two input clocks (K and /K) for precise DDR timing at clock rising edges only
Two input clocks for output data (C and /C) to minimize clock skew and flight time mismatches
Two output echo clocks (CQ and /CQ) simplify data capture in high-speed systems
Clock-stop capability with
μs
restart
I/O
Separate independent read and write data ports with concurrent transactions
100% bus utilization DDR read and write operation
HSTL I/O
User programmable output impedance
PLL circuitry for wide output data valid window and future frequency scaling
Function
Two-tick burst for low DDR transaction size
Internally self-timed write control
Simple control logic for easy depth expansion
JTAG 1149.1 compatible test access port
Package
165 FBGA package (13 x 15 x 1.4 mm)
R10DS0246EJ0100 Rev.1.00
Jan.13, 2015
Page 1 of 29
Analog electronics
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