10 Base-T Interface Module
ELECTRONICS INC.
EPE6199S
• Optimized for Level One LXT905 •
• Two pairs of TX and RX in 40 pin SOIC package •
• Robust design allows for toughest soldering process •
• Complies with or exceeds IEEE 802.3, 10 Base-T Requirements •
Electrical Parameters @ 25° C
Group
Delay
(nS Max.)
5-10
MHz
Xmit
3
Rcv
---
•
Xmit
-1
Insertion
Loss
(dB Max.)
1-10
MHz
Rcv
-1
Xmit
-15
Return
Loss
(dB Min.)
5-10
MHz
Rcv
-15
@ 25
MHz
Xmit
-10
Rcv
---
Attenuation
(dB Min.) (1)
Common Mode
Rejection
(dB Min.)
@ 40
MHz
Xmit
-30
Rcv
---
@ 50
MHz
Xmit
-30
Rcv
-30
@ 100
MHz
Xmit
-25
Rcv
-25
-30
Crosstalk
(dB Min.)
@ 30
MHz
Xmit
-20
Rcv
---
@ 1-10
MHz
Isolation
: meets or exceeds 802.3 IEEE Requirements •
Characteristic Filter Impedance
: 100
Ω
•
(1) Referenced @ 5 MHz response.
Schematic
Transmit Channel
1,11
2,12
1:2
12.4Ω
LPF
3,13
12.4Ω
38,27
40,29
39,28
8,18
100Ω
9,19
10,20
33,22
1:1
34,23
Receive Channel
Package
A
(J)
R
N
Dim.
PCA
EPF6199S
Date Code
B
40
21
Solder Pad Layout
Q
1
20
P
A
B
C
D
E
F
G
H
I
(J)
K
L
M
N
P
Q
R
S
Dimensions
(Inches)
Min.
Max. Nom.
1.105
.470
.200
.950
.005
.050
.620
.016
.008
.083
0°
.025
1.125
.490
.220
Typ.
.015
Typ.
.640
.022.
.012
Typ.
8°
.045
.030
.050
.090
.670
2 plcs
2 plcs
(Millimeters)
Min.
Max. Nom.
28.67
11.94
5.08
24.13
.127
1.27
15.75
.406
.203
2.10
0°
.635
28.58
12.45
5.59
Typ.
.381
Typ.
16.26
.559
.305
Typ.
8°
1.14
.762
1.27
2.29
17.02
2 plcs
2 plcs
S
D
C
F
H
E
M
K
L
G
I
.200
.250
Typ.
Typ.
5.08
6.35
Typ.
Typ.
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
CSE6199Sa
Rev.-
6/5/97
Product performance is limited to specified parameters. Data is subject to change without prior notice.
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pca.com
10 Base-T Interface Module
ELECTRONICS INC.
EPE6199S
The circuit below is a guideline for interconnecting PCA’s EPE6199S with LXT905 10 Base-T PHY chip over UTP cable.
Further details of system design, such as chip pin-out, etc. can be obtained from the specific chip manufacturer.
Typical insertion loss of the isolation transformer is 0.7dB. This parameter covers the entire spectrum of the encoded signals
in 10 Base-T protocols. However, the predistortion resistor network introduces some loss which has to be taken into account
in determining how well your design meets the Standard Template requirements. Additionally, the following need to be
considered while selecting resistor values :
a. Each channel needs 100Ω termination, thus the Thevenin’s equivalent resistance seen by a channel looking into the
transmit outputs from the chip must be equal to a value close to 100Ω. The LXT 905 driver output impedances are very low.
. Thus only 11.8Ω on TPON & TPOP are enough to provide a balanced 25
Ω
termination given that turns ratio is 1:2.
Following these guidelines will guarantee that the return loss specifications are satisfied at all extremes of cable impedance
(i.e. 85Ω to 115Ω) while the module is installed in your system. The receiver channel termination is rather straight forward:
two 50Ω loads provide the balanced termination to the cable.
b. That the template requirements are satisfied under the worst case Vcc (i.e. 4.5V), will impose a further constraint on
resistor selection, in that they ought to be the minimum derived from the calculations. Users can allow for pads on their PCB
for a shunting resistor across pins 6 and 8 of EPE6199S for more flexibility in setting voltage levels at the outputs.
Note that some systems have auto polarity detection and some do not. If not, be certain to follow the proper polarity.
The pulldown resistors used around the RJ45 connector have been known to suppress unwanted radiation that unused wires
pick up from the immediate environment. Their placement and use are to be considered carefully before a design is finalized.
It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit the
plane off at least 0.08 inches away from the chip side pins of EPE6199S. There need not be any ground plane beyond this
point.
For best results, PCB designer should design the outgoing traces preferably to be 50Ω, balanced and well coupled to achieve
minimum radiation from these traces.
Typical Application Circuit for UTP for one port only.
TPIN
9
39
10
3
6
1
2
TX+
TX-
EPE6199S
38
34
RJ45*
RX+
RX-
4
5
7
8
LXT905
PHY
TPIP
TPON
8
3
2
1
33
TPOP
0.1µF
X7R
0.1µF
X7R
High voltage cap, if used
2KV recommended
Chassis
Ground
Notes : * Pin-outs shown are for Hubs and Repeaters.
PCA ELECTRONICS, INC.
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
CSE6199Sb
Rev. -
6/5/97
TEL: (818) 892-0761
FAX: (818) 894-5791
http://www.pca.com
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