EP6400-3 datasheet, PDF - EEWORLD Datasheet

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EP6400-3: Description14 Pin DIP Passive Delay Lines; Categorylogic logic; File Size16KB，1 Pages; ManufacturerPCA Electronics Inc.; Websitehttp://www.pca.com/

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EP6400-3 Overview

14 Pin DIP Passive Delay Lines

EP6400-3 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	PCA Electronics Inc.
Parts packaging code	DIP
package instruction	DIP-14
Contacts	14
Reach Compliance Code	compli
Other features	MAX RISE TIME CAPTURED
Input frequency maximum value (fmax)	4 MHz
JESD-30 code	R-XDIP-T14
JESD-609 code	e0
length	19.304 mm
Logic integrated circuit type	PASSIVE DELAY LINE
Humidity sensitivity level	3
Number of functions	1
Number of taps/steps	10
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output impedance nominal value (Z0)	50 Ω
Output polarity	TRUE
Package body material	UNSPECIFIED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
programmable delay line	NO
Certification status	Not Qualified
Maximum seat height	5.842 mm
surface mount	NO
technology	HYBRID
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	50 ns
width	7.62 mm

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14 Pin DIP Passive Delay Lines

DELAY

OHMS nS ±5%

±10% or ± 2nS†

TAP

RISE

DELAYS TIME

nS ±10%

or ± 0.5nS† Max.

2.5

5 ±1

ATTEN

Max.

PCA

PART

NUBER

DELAY

OHMS nS ±5%

±10% or ± 2nS†

TAP

RISE

DELAYS TIME

nS ± 10%

or ± 0.5nS† Max.

6 ±1

100

ATTEN

Max.

PCA

PART

NUMBER

100

200

100

250

EP6400-1

EP6400-2

EP6400-3

EP6400-4

EP6400-5

EP6400-6

EP6400-18

EP6400-17

EP6400-7

200

250

300

500

100

200

250

150

300

100

250

500

EP6400-8

EP6400-9

EP6400-16

EP6400-10

EP6400-11

EP6400-12

EP6400-13

EP6400-14

EP6400-15

†Whichever

is greater.

DC Electrical Characteristics

Distortion

Temperature Coefficient of Delay

Insulation Resistance @ 100 Vdc

Dielectric Strength

Min

Max

±10

100

Unit

PPM/°C

Meg Ohms

Vdc

Schematic

OUT

100

GROUND

Recommended Operating

Conditions

PW*

Pulse Width % of Total Delay

Duty Cycle

Operating Free Air Temperature

Min

200

Max

Unit

°C

Package Dimensions

*These two values are inter-dependent.

White Dot

Pin#1

PCA

EP6400-1

Date Code

.280

Max.

.780 Max.

.020

Min.

.010

Typ.

.365

Max.

.230

Max.

Input Pulse Test Conditions @ 25°C

VIN

TRI

PRR

Pulse Input Voltage

Pulse Width % of Total Delay

Input Rise Time (10 - 90%)

Pulse Repetition Rate @ Td

≤

150 nS

Pulse Repetition Rate @ Td > 150 nS

3 Volts

300 %

2.0 nS

1.0 MHz

300 KHz

.020

Typ.

.150 Typ.

.100 Typ.

DSD6400 Rev. A

2/5/96

QAF-CSO1 Rev. B 8/25/94

Unless Otherwise Noted Dimensions in Inches

Tolerances:

Fractional = ± 1/32

.XX = ± .030

.XXX = ± .010

ELECTRONICS

INC.

16799 SCHOENBORN ST.

NORTH HILLS, CA 91343

TEL: (818) 892-0761

FAX: (818) 894-5791

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