High Voltage Synchronous Rectified Buck MOSFET
Drivers
ISL6208, ISL6208B
The ISL6208 and ISL6208B are high frequency, dual MOSFET
drivers, optimized to drive two N-Channel power MOSFETs in a
synchronous-rectified buck converter topology. They are
especially suited for mobile computing applications that
require high efficiency and excellent thermal performance.
These drivers, combined with an Intersil multiphase Buck
PWM controller, form a complete single-stage core-voltage
regulator solution for advanced mobile microprocessors.
ISL6208 and ISL6208B have the same function but different
packages. The descriptions in this datasheet are based on
ISL6208 and also apply to ISL6208B.
The ISL6208 features 4A typical sinking current for the lower
gate driver. This current is capable of holding the lower
MOSFET gate off during the rising edge of the Phase node. This
prevents shoot-through power loss caused by the high dv/dt of
phase voltages. The operating voltage matches the 30V
breakdown voltage of the MOSFETs commonly used in mobile
computer power supplies.
The ISL6208 also features a three-state PWM input that,
working together with Intersil’s multiphase PWM controllers,
will prevent negative voltage output during CPU shutdown. This
feature eliminates a protective Schottky diode usually seen in
a microprocessor power systems.
MOSFET gates can be efficiently switched up to 2MHz using
the ISL6208. Each driver is capable of driving a 3000pF load
with propagation delays of 8ns and transition times under
10ns. Bootstrapping is implemented with an internal Schottky
diode. This reduces system cost and complexity, while allowing
the use of higher performance MOSFETs. Adaptive shoot-
through protection is integrated to prevent both MOSFETs from
conducting simultaneously.
A diode emulation feature is integrated in the ISL6208 to
enhance converter efficiency at light load conditions. This
feature also allows for monotonic start-up into pre-biased
outputs. When diode emulation is enabled, the driver will allow
discontinuous conduction mode by detecting when the
inductor current reaches zero and subsequently turning off the
low side MOSFET gate.
Features
• Dual MOSFET Drives for Synchronous Rectified Bridge
• Adaptive Shoot-Through Protection
• 0.5Ω On-Resistance and 4A Sink Current Capability
• Supports High Switching Frequency up to 2MHz
- Fast Output Rise And Fall Time
- Low Propagation Delay
• Three-State PWM Input for Power Stage Shutdown
• Internal Bootstrap Schottky Diode
• Low Bias Supply Current (5V, 80µA)
• Diode Emulation for Enhanced Light Load Efficiency and
Pre-Biased Start-Up Applications
• VCC POR (Power-On-Reset) Feature Integrated
• Low Three-State Shutdown Holdoff Time (Typical 160ns)
• Pin-to-Pin Compatible with ISL6207
• QFN and DFN Package:
- Compliant to JEDEC PUB95 MO-220
QFN - Quad Flat No Leads - Package Outline
DFN - Dual Flat No Leads - Package Outline
- Near Chip Scale Package Footprint, which Improves PCB
Efficiency and has a Thinner Profile
• Pb-Free (RoHS Compliant)
Applications
• Core Voltage Supplies for Intel® and AMD® Mobile
Microprocessors
• High Frequency Low Profile DC/DC Converters
• High Current Low Output Voltage DC/DC Converters
• High Input Voltage DC/DC Converters
Related Literature
• Technical Brief
TB363
“Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief
TB389
“PCB Land Pattern Design and
Surface Mount Guidelines for MLFP Packages”
• Technical Brief
TB447
“Guidelines for Preventing
Boot-to-Phase Stress on Half-Bridge MOSFET Driver ICs”
January 31, 2012
FN9115.6
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2004-2008, 2011, 2012. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL6208, ISL6208B
Absolute Maximum Ratings
ti
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
8 Ld SOIC Package (Notes 5, 8) . . . . . . . . .
110
67
8 Ld 3x3 QFN Package (Notes 6, 7) . . . . . .
80
15
8 Ld 2x2 DFN Package (Notes 6, 7) . . . . . .
89
24
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input Voltage (V
FCCM
, V
PWM
) . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
BOOT Voltage (V
BOOT-GND
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 33V
BOOT To PHASE Voltage (V
BOOT-PHASE
). . . . . . . . . . . . . . . . -0.3V to 7V (DC)
-0.3V to 9V (<10ns)
PHASE Voltage (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 30V
GND - 8V (<20ns Pulse Width, 10µJ)
UGATE Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . V
PHASE
- 0.3V (DC) to V
BOOT
V
PHASE
- 5V (<20ns Pulse Width, 10µJ) to V
BOOT
LGATE Voltage . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V (DC) to VCC + 0.3V
GND - 2.5V (<20ns Pulse Width, 5µJ) to VCC + 0.3V
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
Recommended Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-10°C to +100°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. The Phase Voltage is capable of withstanding -7V when the BOOT pin is at GND.
5.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief
TB379
for details.
6.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
7. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
8. For
θ
JC
, the “case temp” location is taken at the package top center.
Electrical Specifications
temperature range.
PARAMETER
Recommended Operating Conditions, Unless Otherwise Noted. Boldface limits apply over the operating
MIN
(Note 10)
MAX
(Note 10) UNITS
SYMBOL
TEST CONDITIONS
TYP
V
CC
SUPPLY CURRENT
Bias Supply Current
I
VCC
PWM pin floating, V
FCCM
= 5V
-
80
-
µA
POR
V
CC
Rising
V
CC
Falling
Hysteresis
-
2.40
-
3.40
2.90
500
3.90
-
-
V
V
mV
BOOTSTRAP DIODE
Forward Voltage
V
F
V
VCC
= 5V, forward bias current = 2mA
0.50
0.55
0.65
V
PWM INPUT
Input Current
I
PWM
V
PWM
= 5V
V
PWM
= 0V
PWM Three-State Rising Threshold
PWM Three-State Falling Threshold
Three-State Shutdown Hold-off Time
t
TSSHD
V
VCC
= 5V
V
VCC
= 5V
V
VCC
= 5V, temperature = +25°C
-
-
0.70
3.5
100
250
-250
1.00
3.8
175
-
-
1.30
4.1
250
µA
µA
V
V
ns
FCCM INPUT
FCCM LOW Threshold
FCCM HIGH Threshold
0.50
-
-
-
-
2.0
V
V
SWITCHING TIME
UGATE Rise Time (Note 9)
LGATE Rise Time (Note 9)
t
RU
t
RL
V
VCC
= 5V, 3nF load
V
VCC
= 5V, 3nF load
-
-
8.0
8.0
-
-
ns
ns
3
FN9115.6
January 31, 2012
ISL6208, ISL6208B
Electrical Specifications
temperature range.
PARAMETER
UGATE Fall Time (Note 9)
LGATE Fall Time (Note 9)
UGATE Turn-Off Propagation Delay
LGATE Turn-Off Propagation Delay
UGATE Turn-On Propagation Delay
LGATE Turn-On Propagation Delay
UG/LG Three-State Propagation Delay
Minimum LG ON-TIME in DCM (Note9)
SYMBOL
t
FU
t
FL
t
PDLU
t
PDLL
t
PDHU
t
PDHL
t
PTS
t
LGMIN
TEST CONDITIONS
V
VCC
= 5V, 3nF load
V
VCC
= 5V, 3nF load
V
VCC
= 5V, outputs unloaded
V
VCC
= 5V, outputs unloaded
V
VCC
= 5V, outputs unloaded
V
VCC
= 5V, outputs unloaded
V
VCC
= 5V, outputs unloaded
MIN
(Note 10)
-
-
-
-
10
10
-
-
TYP
8.0
4.0
18
25
20
20
35
400
MAX
(Note 10) UNITS
-
-
-
-
30
30
-
-
ns
ns
ns
ns
ns
ns
ns
ns
Recommended Operating Conditions, Unless Otherwise Noted. Boldface limits apply over the operating
OUTPUT
Upper Drive Source Resistance
Upper Driver Source Current (Note 9)
Upper Drive Sink Resistance
Upper Driver Sink Current (Note 9)
Lower Drive Source Resistance
Lower Driver Source Current (Note 9)
Lower Drive Sink Resistance
Lower Driver Sink Current (Note 9)
NOTES:
9. Limits established by characterization and are not production tested.
10. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
R
U
I
U
R
U
I
U
R
L
I
L
R
L
I
L
500mA source current
V
UGATE-PHASE
= 2.5V
500mA sink current
V
UGATE-PHASE
= 2.5V
500mA source current
V
LGATE
= 2.5V
500mA sink current
V
LGATE
= 2.5V
-
-
-
-
-
-
-
-
1
2.00
1
2.00
1
2.00
0.5
4.00
2.5
-
2.5
-
2.5
-
1.0
-
Ω
A
Ω
A
Ω
A
Ω
A
4
FN9115.6
January 31, 2012
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