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L2A45A101K4X4A

Description
ISOLATED C NETWORK, 50V, C0G, 0.0001uF, SURFACE MOUNT, CHIP-8, CHIP
CategoryPassive components    capacitor   
File Size159KB,3 Pages
ManufacturerAVX
Download Datasheet Parametric Compare View All

L2A45A101K4X4A Overview

ISOLATED C NETWORK, 50V, C0G, 0.0001uF, SURFACE MOUNT, CHIP-8, CHIP

L2A45A101K4X4A Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Objectid1996782550
package instructionCHIP,
Reach Compliance Codecompliant
ECCN codeEAR99
capacitance0.0001 µF
Capacitor typeARRAY/NETWORK CAPACITOR
JESD-609 codee0
length2.1 mm
Manufacturer's serial numberL2A
Installation featuresSURFACE MOUNT
negative tolerance10%
Network TypeISOLATED C NETWORK
Number of components1
Number of functions4
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
encapsulated codeCHIP
Package shapeRECTANGULAR PACKAGE
method of packingTR, EMBOSSED/PAPER, 13 INCH
positive tolerance10%
Rated (DC) voltage (URdc)50 V
Maximum seat height0.94 mm
surface mountYES
Temperature characteristic codeC0G
Temperature Coefficient-/+30ppm/Cel ppm/°C
Terminal surfaceTin/Lead (Sn/Pb)
Terminal pitch0.5 mm
Terminal shapeWRAPAROUND
width1.3 mm
Capacitor Array
Capacitor Array (IPC)
BENEFITS OF USING CAPACITOR
ARRAYS
AVX capacitor arrays offer designers the opportunity to
lower placement costs, increase assembly line output
through lower component count per board and to reduce
real estate requirements.
For high volume users of cap arrays using the very latest
placement equipment capable of placing 10 components per
second, the increase in throughput can be very significant and
can have the overall effect of reducing the number of place-
ment machines required to mount components:
If 120 million 2-element arrays or 40 million 4-element arrays
were placed in a year, the requirement for placement
equipment would be reduced by one machine.
During a 20Hr operational day a machine places 720K
components. Over a working year of 167 days the machine
can place approximately 120 million. If 2-element arrays are
mounted instead of discrete components, then the number
of placements is reduced by a factor of two and in the
scenario where 120 million 2-element arrays are placed there
is a saving of one pick and place machine.
Smaller volume users can also benefit from replacing
discrete components with arrays. The total number of place-
ments is reduced thus creating spare capacity on placement
machines. This in turn generates the opportunity to increase
overall production output without further investment in new
equipment.
Reduced Costs
Placement costs are greatly reduced by effectively placing
one device instead of four or two. This results in increased
throughput and translates into savings on machine time.
Inventory levels are lowered and further savings are made
on solder materials, etc.
Space Saving
Space savings can be quite dramatic when compared to
the use of discrete chip capacitors. As an example, the
0508 4-element array offers a space reduction of >40% vs.
4 x 0402 discrete capacitors and of >70% vs. 4 x 0603
discrete capacitors. (This calculation is dependent on the
spacing of the discrete components.)
Increased Throughput
Assuming that there are 220 passive components placed in a
mobile phone:
A reduction in the passive count to 200 (by replacing
discrete components with arrays) results in an increase in
throughput of approximately 9%.
A reduction of 40 placements increases throughput by 18%.
W2A (0508) Capacitor Arrays
4 pcs 0402 Capacitors
=
1 pc 0508 Array
1.0
1.4
(0.055) (0.039)
1.88
(0.074)
5.0 (0.197)
AREA = 7.0mm
2
(0.276 in
2
)
2.1 (0.083)
AREA = 3.95mm
2
(0.156 in
2
)
The 0508 4-element capacitor array gives a PCB space saving of over 40%
vs four 0402 discretes and over 70% vs four 0603 discrete capacitors.
W3A (0612) Capacitor Arrays
4 pcs 0603 Capacitors
=
1 pc 0612 Array
2.3
1.5
(0.091) (0.059)
2.0
(0.079)
6.0 (0.236)
AREA = 13.8mm
2
(0.543 in
2
)
3.2 (0.126)
AREA = 6.4mm
2
(0.252 in
2
)
The 0612 4-element capacitor array gives a PCB space saving of over 50%
vs four 0603 discretes and over 70% vs four 0805 discrete capacitors.
64

L2A45A101K4X4A Related Products

L2A45A101K4X4A L2A45A101K4X2A L2A45A101K4X2F L2A43C332K4X2F
Description ISOLATED C NETWORK, 50V, C0G, 0.0001uF, SURFACE MOUNT, CHIP-8, CHIP ISOLATED C NETWORK, 50V, C0G, 0.0001uF, SURFACE MOUNT, CHIP-8, CHIP ISOLATED C NETWORK, 50V, C0G, 0.0001uF, SURFACE MOUNT, CHIP-8, CHIP L2A43C332K4X2F, CHIP
Is it lead-free? Contains lead Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible incompatible
Objectid 1996782550 1996782548 1996782549 1996782783
package instruction CHIP, CHIP, CHIP, CHIP,
Reach Compliance Code compliant compliant compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99
capacitance 0.0001 µF 0.0001 µF 0.0001 µF 0.0033 µF
Capacitor type ARRAY/NETWORK CAPACITOR ARRAY/NETWORK CAPACITOR ARRAY/NETWORK CAPACITOR ARRAY/NETWORK CAPACITOR
JESD-609 code e0 e0 e0 e0
length 2.1 mm 2.1 mm 2.1 mm 2.1 mm
Manufacturer's serial number L2A L2A L2A L2A
Installation features SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT SURFACE MOUNT
negative tolerance 10% 10% 10% 10%
Network Type ISOLATED C NETWORK ISOLATED C NETWORK ISOLATED C NETWORK ISOLATED C NETWORK
Number of components 1 1 1 1
Number of functions 4 4 4 4
Number of terminals 8 8 8 8
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C
encapsulated code CHIP CHIP CHIP CHIP
Package shape RECTANGULAR PACKAGE RECTANGULAR PACKAGE RECTANGULAR PACKAGE RECTANGULAR PACKAGE
method of packing TR, EMBOSSED/PAPER, 13 INCH TR, EMBOSSED/PAPER, 7 INCH TR, EMBOSSED/PAPER, 7 INCH TR, EMBOSSED/PAPER, 7 INCH
positive tolerance 10% 10% 10% 10%
Rated (DC) voltage (URdc) 50 V 50 V 50 V 25 V
Maximum seat height 0.94 mm 0.94 mm 0.94 mm 0.94 mm
surface mount YES YES YES YES
Temperature characteristic code C0G C0G C0G X7R
Temperature Coefficient -/+30ppm/Cel ppm/°C -/+30ppm/Cel ppm/°C -/+30ppm/Cel ppm/°C 15% ppm/°C
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal shape WRAPAROUND WRAPAROUND WRAPAROUND WRAPAROUND
width 1.3 mm 1.3 mm 1.3 mm 1.3 mm
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