D-SUB-205AE09YSNDBD1 datasheet, PDF

D-SUB-205AE09YSNDBD1: DescriptionD Type Connector, 9 Contact(s), Female, 0.109 inch Pitch, Solder Terminal, #4-40, Plug; CategoryThe connector The connector; File Size124KB，1 Pages; ManufacturerPalPilot; Environmental Compliance

Download Datasheet Parametric View All

D-SUB-205AE09YSNDBD1 Overview

D Type Connector, 9 Contact(s), Female, 0.109 inch Pitch, Solder Terminal, #4-40, Plug

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Objectid	1166568745
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	ROHS COMPLIANT
body width	0.492 inch
subject depth	0.492 inch
body length	1.213 inch
Body/casing type	PLUG
Contact to complete cooperation	GOLD FLASH OVER NICKEL (50)
Contact completed and terminated	Tin (Sn) - with Nickel (Ni) barrier
Contact point gender	FEMALE
Contact material	COPPER ALLOY
contact mode	STAGGERED
Contact resistance	15 mΩ
Contact style	RND PIN-SKT
Dielectric withstand voltage	1000VAC V
Insulation resistance	3000000000 Ω
Insulator color	WHITE
insulator material	POLYBUTYLENE TEREPHTHALATE
JESD-609 code	e3
Manufacturer's serial number	205
Plug contact pitch	0.109 inch
Match contact row spacing	0.112 inch
Installation option 1	#4-40
Installation option 2	RIVET
Installation method	RIGHT ANGLE
Installation type	BOARD
PCB row number	2
Number of rows loaded	2
Maximum operating temperature	105 °C
Minimum operating temperature	-55 °C
PCB contact pattern	STAGGERED
PCB contact row spacing	2.8448 mm
Plating thickness	FLASH inch
Rated current (signal)	3 A
Guideline	UL
reliability	COMMERCIAL
Shell surface	NICKEL
Shell material	STEEL
Terminal length	0.125 inch
Terminal pitch	2.7686 mm
Termination type	SOLDER
Total number of contacts	9

Unable to perform JTAG emulation: I have already pinned it out, the voltage is 3.25V, the target chip is TMS320F28069, there is no EMU0, EMU1 pin, an error occurs.[[i] This post was last edited by cl17726 on 2013-6-29 13:45[/i]]...; cl17726 Microcontroller MCU

[FPGA entry to actual combat] Common Verilog skills (Part 1, Part 2) Source code & Q&A: [FPGA entry to actual combat] Verilog basic syntax, module writing, common Verilog skills (Part 1 and 2) Source code:If students do not understand the knowledge points in the video, they can ask quest...; laokai FPGA/CPLD

Regarding PWM gradient, please give me more advice: First of all, I would like to thank the moderator and all the experts for their guidance on the previous issue.Now, there is another problem: I want to make the red light dim and the blue light bright...; esobao MCU

Can Segger's Jlink be used to debug the LM3S9000 series?: Just as the title says....; 438629087 Microcontroller MCU

What is the working principle of LDO?: What is the working principle of LDO? How does it ensure the output voltage is stable when the load current is constantly changing? For example, 5V to 3.3V...; debugme Analog electronics

Delay program based on msp430g2553: #include "msp430g2553.h" #define uint unsigned int //60us delay, 8M crystal oscillator void delay(uint z) {unsigned int i,j;for(i = 0;i60;i++)for(j=0;jz;j++){;;}; } //1us delay, 8M crystal oscillator ...; tcvsdonnnie Microcontroller MCU

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components