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P5106UAL

Description
Multiport Balanced SIDACtor Device
CategoryAnalog mixed-signal IC    Trigger device   
File Size971KB,5 Pages
ManufacturerLittelfuse
Websitehttp://www.littelfuse.com
Environmental Compliance
Download Datasheet Parametric View All

P5106UAL Overview

Multiport Balanced SIDACtor Device

P5106UAL Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSMALL OUTLINE, R-PDSO-G6
Contacts6
Reach Compliance Codeunknow
Configuration2 BANKS, STAR CONNECTED, 3 ELEMENTS
Maximum off-state DC voltage420 V
JESD-30 codeR-PDSO-G6
JESD-609 codee3
Humidity sensitivity level1
On-state non-repetitive peak current20 A
Number of components6
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal locationDUAL
Maximum time at peak reflow temperature30
Trigger device typeSILICON SURGE PROTECTOR
Base Number Matches1
Baseband Protection (Voice-DS1)
SIDACtor
®
Protection Thyristors
SIDACtor
®
Balanced Multiport Series - MS-013
Description
RoHS
Pb
e3
SIDACtor
®
Balanced Multiport Series MS-013 are designed
to protect baseband equipment from overvoltage
transients. The patented “Y” configuration ensures
balanced overvoltage protection that prevents longitudinal
to differential conversions.
The series provides overvoltage protection that prevents
longitudinal to differential conversions.
Features and Benefits
• Low voltage overshoot
• Low on-state voltage
• Does not degrade surge
capability after multiple
surge events within limit.
• Fails short circuit when
surged in excess of
ratings
• Low capacitance
• Replaces six discrete
devices
• Balanced overvoltage
protection
Applicable Global Standards
4
Agency Approvals
Agency
Agency File Number
E133083
Pinout Designation
1
2
3
6
5
• Meets UL/IEC 60950-1
creepage and clearance
• Two-port protection
• Pb-free E3 means 2nd
level interconnect is
Pb-free and the terminal
finish material is tin(Sn)
(IPC/JEDEC J-STD-
609A.01)
• RoHS compliant and
lead-free
Schematic Diagram
1
2
3
6
5
4
• TIA-968-A
• TIA-968-B
• ITU K.20/21/45 Enhanced
Level*
• ITU K.20/21/45 Basic
Level
• GR 1089 Inter-building*
*A/B-rated parts require series resistance
• GR 1089 Intra-building
• IEC 61000-4-5 2nd
edition
• YD/T 1082
• YD/T 993
• YD/T 950
Electrical Characteristics
V
S
V
DRM
V
S
V
DRM
@l
DRM
=5µA @100V/µs @l
DRM
=5µA @100V/µs
V min
V max
V min
V max
Pins 1-2, 3-2, 4-5, 6-5
Pins 1-3, 4-6
Part Number
A2106UA6Lxx
A5030UA6Lxx
A2106UB6Lxx
A5030UB6Lxx
A2106UC6Lxx
A3614UC6Lxx
A5030UC6Lxx
P1556UALxx
P1806UALxx
P2106UALxx
P2356UALxx
P2706UALxx
P3206UALxx
P3406UALxx
Marking
A2106UA6
A5030UA6
A2106UB6
A5030UB6
A2106UC6
A3614UC6
A5030UC6
P1556UA
P1806UA
P2106UA
P2356UA
P2706UA
P3206UA
P3406UA
V
T
@I
T
=2.2 A
V max
Pins 1-2, 3-2, 4-5, 6-5
I
H
mA
min
I
S
mA
max
I
T
A
max
Capacitance
170
400
170
400
170
333
400
130
150
170
200
230
270
300
250
550
250
550
250
427
550
180
210
250
270
300
350
400
50
270
50
270
50
116
270
130
150
170
200
230
270
300
80
340
80
340
80
154
340
180
210
250
270
300
350
400
8
8
8
8
8
8
8
8
8
8
8
8
8
8
120 800 2.2
150 800 2.2
120 800 2.2
150 800 2.2
120 800 2.2
150 800 2.2
See
150 800 2.2
Capacitance
150 800 2.2
Values Table
150 800 2.2
150 800 2.2
150 800 2.2
150 800 2.2
150 800 2.2
150 800 2.2
Table continues on next page.
© 2017 Littelfuse, Inc.
Specifications are subject to change without notice.
Revised: 02/23/17
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