39528-0032 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > 39528-0032

Preview

39528-0032: Description5.00mm Pitch Eurostyle Horizontal PCB Dual Level Header; File Size40KB，1 Pages; ManufacturerMolex; Websitehttps://www.molex.com/molex/home

Download Datasheet View All

39528-0032 Overview

5.00mm Pitch Eurostyle Horizontal PCB Dual Level Header

Preview

Download Datasheet

View All

This document was generated on 10/10/2014

PLEASE CHECK WWW.MOLEX.COM FOR LATEST PART INFORMATION

Part Number:

Status:

Overview:

Description:

Documents:

3D Model

Drawing (PDF)

39528-0032

Active

Eurostyle™ Terminal Blocks

5.00mm Pitch Eurostyle™ Horizontal PCB Dual Level Header, Open Ends, 32 Circuits

Product Specification PS-39500-001 (PDF)

RoHS Certificate of Compliance (PDF)

Series

Terminal Blocks

39528

N/A

PCB Header

Eurostyle™ Terminal Blocks

ESE, Eurostyle™Pluggable

Euro Block

822350522762

image - Reference only

EU RoHS

ELV and RoHS

Compliant

REACH SVHC

Not Reviewed

Low-Halogen Status

Not Reviewed

China RoHS

General

Product Family

Series

Application

Component Type

Overview

Product Name

Type

UPC

Physical

Circuits (Loaded)

Entry Angle

Lock to Mating Part

Number of Rows

Orientation

PC Tail Length

PCB Thickness - Recommended

Panel Mount

Pitch - Mating Interface

Pitch - Termination Interface

Polarized to Mating Part

Shrouded

Stackable

Surface Mount Compatible (SMC)

Temperature Range - Operating

Wire Size AWG

N/A

Yes

Horizontal

5.00mm

3.05mm

5.00mm

Yes

Open Ends

Yes

N/A

-40°C to +105°C

N/A

Need more information on product

environmental compliance?

Email productcompliance@molex.com

For a multiple part number RoHS Certificate of

Compliance, click here

Please visit the Contact Us section for any

non-product compliance questions.

Search Parts in this Series

39528Series

Mates With

39520 Horizontal Plug, 39523 Vertical Plug,

Most 5.00mm Pitch Industry Standard Plugs

Electrical

Current - Maximum per Contact

Voltage - Maximum

15A

300V

Material Info

Reference - Drawing Numbers

Product Specification

Sales Drawing

PS-39500-001

SD-39528-001

This document was generated on 10/10/2014

PLEASE CHECK WWW.MOLEX.COM FOR LATEST PART INFORMATION

Recommended Resources

One of the lighting delay circuits using single-junction transistors

2x80WHI-FI power amplifier 02

Video Game Fishing Circuit

Millivoltmeter circuit with high input impedance

Circuit diagram (direct feedback)

Single-channel wireless remote control switch (TDC1808/TDC1809)

EVC entry-level questions: According to the evc programming textbook, when creating a new project, there should be 3 tabs: files, projects, workspaces. But why do I only have the files option?? My steps are files->new project o...; wtu8924 Embedded System

Classic dual-core ARM bare metal development, SMP routines: I have been using Cyclone V for a long time, but I still don't know how to develop SMP bare-metal programs for two ARM cores. I searched for a long time over the Internet before I found an example, so...; zhuyue0414 FPGA/CPLD

Just a quick question: Is there anyone here that makes Elan microcontrollers?: I used to make Hetai MCU, but now I have changed to Elan EM78P5840. If anyone is familiar with it, please give me some pointers. I will keep it in mind! Thanks a lot!...; jxb01033016 MCU

Is there any expert who can give me some advice on how to make a perpetual calendar with MSP430F5529?: Is there any master who can guide me to make a perpetual calendar with MSP430F5529? Time is a bit tight. Can a master help me? Thank you very much....; 一懒众衫小 Microcontroller MCU

FPGA controls 12864 LCD display: [i=s] This post was last edited by paulhyde on 2014-9-15 03:59 [/i] FPGA Control 12864 LCD Display...; 495277071 Electronics Design Contest

Capturing the rising edge of the external signal, the modelsim simulation always has a red line: Use FPGA to capture the rising and falling edges of an external signal, and use modelsim to simulate. The result is always as shown in the figure. The capture object is fsmc_cs, pos_cs and neg_cs are ...; Maxwell_CZH FPGA/CPLD

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components