PD - 9.1311A
IRFZ34NS/L
HEXFET
®
Power MOSFET
l
l
l
l
l
l
Advanced Process Technology
Surface Mount (IRFZ34NS)
Low-profile through-hole (IRFZ34NL)
175°C Operating Temperature
Fast Switching
Fully Avalanche Rated
D
V
DSS
= 55V
R
DS(on)
= 0.040Ω
G
I
D
= 29A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D
2
Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D
2
Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
The through-hole version (IRFZ34NL) is available for low-
profile applications.
D 2 Pak
T O -2 6 2
Absolute Maximum Ratings
Parameter
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
A
= 25°C
P
D
@T
C
= 25°C
V
GS
E
AS
I
AR
E
AR
dv/dt
T
J
T
STG
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Power Dissipation
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
29
20
100
3.8
68
0.45
± 20
130
16
5.6
5.0
-55 to + 175
300 (1.6mm from case )
Units
A
W
W
W/°C
V
mJ
A
mJ
V/ns
°C
Thermal Resistance
Parameter
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB mount) **
Typ.
––––
––––
Max.
2.2
40
Units
°C/W
8/25/97
IRFZ34NS/L
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
R
DS(ON)
V
GS(th)
Gate Threshold Voltage
Forward Transconductance
g
fs
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
S
C
iss
C
oss
C
rss
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Internal Source Inductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Min.
55
–––
–––
2.0
6.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.052
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
7.0
49
31
40
Max. Units
Conditions
–––
V
V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 1mA
0.040
Ω
V
GS
= 10V, I
D
= 16A
4.0
V
V
DS
= V
GS
, I
D
= 250µA
–––
S
V
DS
= 25V, I
D
= 16A
25
V
DS
= 55V, V
GS
= 0V
µA
250
V
DS
= 44V, V
GS
= 0V, T
J
= 150°C
100
V
GS
= 20V
nA
-100
V
GS
= -20V
34
I
D
= 16A
6.8
nC V
DS
= 44V
14
V
GS
= 10V, See Fig. 6 and 13
–––
V
DD
= 28V
–––
I
D
= 16A
ns
–––
R
G
= 18Ω
–––
R
D
= 1.8Ω, See Fig. 10
Between lead,
nH
7.5 –––
and center of die contact
700 –––
V
GS
= 0V
240 –––
pF
V
DS
= 25V
100 –––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
––– ––– 29
showing the
A
G
integral reverse
––– ––– 100
p-n junction diode.
S
––– ––– 1.6
V
T
J
= 25°C, I
S
= 16A, V
GS
= 0V
––– 57
86
ns
T
J
= 25°C, I
F
= 16A
––– 130 200
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
I
SD
≤
16 A, di/dt
≤
420A/µs, V
DD
≤
V
(BR)DSS
,
T
J
≤
175°C
V
DD
= 25V, starting T
J
= 25°C, L = 610µH
R
G
= 25Ω, I
AS
= 16A. (See Figure 12)
Pulse width
≤
300µs; duty cycle
≤
2%.
Uses IRFZ34N data and test conditions
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRFZ34NS/L
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
TOP
1000
I , D ra in -to -S o u rce C u rre n t (A )
D
100
I , D ra in -to -S o u rce C u rre n t (A )
D
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTT OM 4.5V
TOP
100
10
10
4 .5V
4 .5V
2 0µ s PU LSE W ID TH
1
0.1
T
C
= 25°C
T
J
= 2 5°C
1
10
A
100
1
0.1
1
20 µs PU L SE W ID TH
T
J
175 °C
T
C
= 175°C
10
100
A
V D S , D rain-to-S ource V oltage (V )
V D S , Drain-to-Source V oltage (V)
Fig 1.
Typical Output Characteristics
Fig 2.
Typical Output Characteristics
100
2.4
R
D S (o n)
, D ra in -to -S o u rc e O n R e s ista n ce
(N o rm a lize d )
I
D
= 2 6A
I
D
, D r ain- to-S ourc e C u rre nt (A )
T
J
= 2 5 °C
T
J
= 1 7 5 ° C
2.0
1.6
10
1.2
0.8
0.4
1
4
5
6
7
V
DS
= 2 5V
2 0 µ s P U LS E W ID T H
8
9
10
A
0.0
-60 -40
-20
0
20
40
60
80
V
G S
= 1 0V
100 120 140 160 180
A
V
G S
, G ate-t o-S ou rce V olt age (V )
T
J
, Junction T em perature (°C )
Fig 3.
Typical Transfer Characteristics
Fig 4.
Normalized On-Resistance
Vs. Temperature
IRFZ34NS/L
1200
1000
800
C
o ss
600
V
G S
, G a te -to -S o u rce V o lta g e (V )
V
GS
C
iss
C
rss
C
is s C
oss
=
=
=
=
0V,
f = 1 MH z
C
gs
+ C
gd
, C
ds
SH O R TED
C
gd
C
ds
+ C
gd
20
I
D
= 1 6A
V
DS
= 4 4V
V
DS
= 2 8V
16
C , C a p a c ita n c e (p F )
12
8
400
C
rs s
200
4
0
1
10
100
A
0
0
10
20
FO R TES T C IR CU IT
SEE FIG U R E 13
30
40
A
V
D S
, Drain-to-Source V oltage (V)
Q
G
, Total Gate Charge (nC )
Fig 5.
Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6.
Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
I
S D
, R e v e rse D ra in C u rre n t (A )
OPE R ATIO N IN TH IS A RE A LIMITE D
BY R
D S(o n)
100
I
D
, D ra in C u rre n t (A )
100
10µ s
T
J
= 175 °C
T
J
= 25 °C
10
100µ s
10
1m s
1
0.4
0.8
1.2
1.6
V
G S
= 0 V
A
1
1
T
C
= 25 °C
T
J
= 17 5°C
S ing le Pulse
10
10m s
A
100
2.0
V
S D
, S ource-to-Drain Voltage (V )
V
D S
, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
Fig 8.
Maximum Safe Operating Area
IRFZ34NS/L
V
DS
30
R
D
V
GS
R
G
D.U.T.
+
25
-
V
DD
I D , Drain Current (A)
10 V
20
Pulse Width
≤ 1
µs
Duty Factor
≤ 0.1 %
15
Fig 10a.
Switching Time Test Circuit
V
DS
90%
10
5
0
25
50
75
100
125
150
175
T C , Case Temperature
( ° C)
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 9.
Maximum Drain Current Vs.
Case Temperature
Fig 10b.
Switching Time Waveforms
10
Thermal Response (Z
thJC
)
1
D = 0.50
0.20
0.10
0.05
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t
1
/ t
2
2. Peak T
J
= P
DM
x Z
thJC
+ T
C
0.1
0.02
0.01
0.01
0.00001
0.0001
0.001
0.01
0.1
t
1
, Rectangular Pulse Duration (sec)
Fig 11.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
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