S80296SA40 datasheet, PDF - EEWORLD Datasheet

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S80296SA40: Description80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER; CategoryThe embedded processor and controller Microcontrollers and processors; File Size281KB，40 Pages; ManufacturerIntel; Websitehttp://www.intel.com/

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S80296SA40 Overview

80296SA COMMERCIAL CHMOS 16-BIT MICROCONTROLLER

S80296SA40 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Intel
Parts packaging code	QFP
package instruction	QFP, QFP100,.7X.9
Contacts	100
Reach Compliance Code	unknown
ECCN code	3A991.A.2
Has ADC	NO
Other features	EVENT PROCESSOR ARRAY
Address bus width	20
bit size	16
CPU series	8096
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	NO
External data bus width	16
JESD-30 code	R-PQFP-G100
JESD-609 code	e0
length	20 mm
Number of I/O lines	32
Number of terminals	100
Maximum operating temperature	70 °C
Minimum operating temperature
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Encapsulate equivalent code	QFP100,.7X.9
Package shape	RECTANGULAR
Package form	FLATPACK
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	2560
rom(word)	0
Maximum seat height	3.15 mm
speed	40 MHz
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER
Base Number Matches	1

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PRELIMINARY

80296SA COMMERCIAL

CHMOS 16-BIT MICROCONTROLLER

50 MHz Operation

†

6 Mbytes of Linear Address Space

512 Bytes of Register RAM

2 Kbytes of Code/Data RAM

Footprint and Functionally Compatible

Upgrade for the 8XC196NP and

80C196NU

Optional Phase-locked Loop (PLL)

Circuitry with 2x or 4x Clock Multiplier

32 I/O Port Pins

19 Interrupt Sources, 14 with

Programmable Priorities

4 External Interrupt Pins and NMI Pin

2 Flexible 16-bit Timer/Counters with

Quadrature Counting Capability

3 Pulse-width Modulator (PWM)

Outputs with High Drive Capability

Full-duplex Serial Port with Dedicated

Baud-rate Generator

†

Chip-select Unit

— 6 Chip-select Pins

— Dynamic Demultiplexed/Multiplexed

Address/Data Bus for Each

Chip Select

— Programmable Wait States

(0–15) for Each Chip Select

— Programmable Bus Width

(8- or 16-bit) for Each Chip Select

— Programmable Address Range for

Each Chip Select

Event Processor Array (EPA) with

4 High-speed Capture/Compare

Channels

Multiply and Accumulate Executes in

80 ns Using the 40-bit Hardware

Accumulator

880 ns 32/16 Unsigned Division

100-pin QFP Package

Complete System Development

Support

High-speed CHMOS Technology

40 MHz standard; 50 MHz is Speed Premium

The 80296SA is a member of Intel’s 16-bit MCS

96 microcontroller family. The 80296SA features 6 Mbytes

of linear address space, a demultiplexed bus, and a chip-select unit. The external bus can dynamically switch

between multiplexed and demultiplexed operation. The device has hardware and instructions to support

various digital signal processing algorithms.

NOTE

This datasheet contains information on new products in production. The specifications

are subject to change without notice. Verify with your local Intel sales office that you have

the latest datasheet before finalizing a design.

January 1997

Order Number:

272748-003

CONTENTS

80296SA Commercial

CHMOS 16-bit Microcontroller

1.0 Product Overview ................................................................................................................ 1

2.0 Nomenclature Overview...................................................................................................... 2

3.0 Pinout .................................................................................................................................. 3

4.0 Signals ................................................................................................................................ 6

5.0 Address Map ..................................................................................................................... 13

6.0 Electrical Characteristics................................................................................................... 14

6.1 DC Characteristics........................................................................................................ 14

6.2 AC Characteristics........................................................................................................ 18

6.2.1 Relationship of XTAL1 to CLKOUT ....................................................................... 18

6.2.2 Explanation of AC Symbols ................................................................................... 19

6.2.3 AC Characteristics — Multiplexed Bus Mode ........................................................ 20

6.2.3.1 System Bus Timings, Multiplexed Bus ...................................................... 22

6.2.3.2 READY Timing, Multiplexed Bus ............................................................... 23

6.2.4 AC Characteristics — Demultiplexed Bus Mode ................................................... 24

6.2.4.1 System Bus Timings, Demultiplexed Bus .................................................. 26

6.2.4.2 READY Timing, Demultiplexed Bus .......................................................... 27

6.2.4.3 80296SA Deferred Bus Timing Mode ........................................................ 28

6.2.5 HOLD#, HLDA# Timings ....................................................................................... 29

6.2.6 AC Characteristics — Serial Port, Synchronous Mode 0 ...................................... 30

6.2.7 External Clock Drive .............................................................................................. 31

7.0 Thermal Characteristics .................................................................................................... 33

8.0 80296SA Errata................................................................................................................. 33

9.0 Datasheet Revision History ............................................................................................... 33

FIGURES

10.

11.

12.

13.

14.

15.

80296SA Block Diagram ......................................................................................................1

The 80296SA Family Nomenclature ....................................................................................2

80296SA 100-pin QFP Package ..........................................................................................3

versus Frequency in Reset ........................................................................................... 17

Effect of Clock Mode on CLKOUT...................................................................................... 18

System Bus Timings, Multiplexed Bus Mode ..................................................................... 22

Example READY Timings at 50 MHz, Multiplexed Bus, BUSCON

= 1 Wait State........... 23

System Bus Timings, Demultiplexed Bus Mode................................................................. 26

Example READY Timings at 50 MHz, Demultiplexed Bus, BUSCON

= 1 Wait State ...... 27

Deferred Bus Mode Timing Diagram.................................................................................. 28

HOLD#, HLDA# Timing Diagram ....................................................................................... 29

Serial Port Waveform — Synchronous Mode 0.................................................................. 30

External Clock Drive Waveforms........................................................................................ 31

AC Testing Input and Output Waveforms During 5.0 Volt Testing ..................................... 32

Float Waveforms During 5.0 Volt Testing........................................................................... 32

iii

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