SSF6005
Main Product Characteristics:
V
DSS
R
DS
(on)
I
D
60V
2.7mΩ(typ.)
160A
TO-220
Marking and pin
Assignment
Schematic diagram
Features and Benefits:
Advanced MOSFET process technology
Special designed for PWM, load switching and
general purpose applications
Ultra low on-resistance with low gate charge
Fast switching and reverse body recovery
175℃ operating temperature
Description:
It utilizes the latest processing techniques to achieve the high cell density and reduces the on-resistance with
high repetitive avalanche rating. These features combine to make this design an extremely efficient and reliable
device for use in power switching application and a wide variety of other applications.
Absolute max Rating:
Symbol
I
D
@ TC = 25°C
I
D
@ TC = 100°C
I
DM
P
D
@TC = 25°C
V
DS
V
GS
E
AS
I
AS
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V①
Continuous Drain Current, V
GS
@ 10V①
Pulsed Drain Current②
Power Dissipation③
Linear Derating Factor
Drain-Source Voltage
Gate-to-Source Voltage
Single Pulse Avalanche Energy @ L=0.07mH②
Avalanche Current @ L=0.07mH②
Operating Junction and Storage Temperature Range
Max.
160
110
640
230
1.5
60
± 20
350
100
-55 to + 175
W
W/°C
V
V
mJ
A
°C
A
Units
©
Silikron Semiconductor CO.,LTD.
2013.08.13
www.silikron.com
Version : 1.1
page 1 of 8
SSF6005
Typ.
—
—
—
Max.
0.65
62
40
Units
℃/W
℃/W
℃/W
Thermal Resistance
Symbol
R
θJC
R
θJA
Characterizes
Junction-to-case③
Junction-to-ambient (t
≤ 10s)
④
Junction-to-Ambient (PCB mounted, steady-state)
④
Electrical Characterizes
@T
A
=25℃
unless otherwise specified
Symbol
V
(BR)DSS
R
DS(on)
V
GS(th)
I
DSS
I
GSS
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
Parameter
Drain-to-Source breakdown voltage
Static Drain-to-Source on-resistance
Gate threshold voltage
Drain-to-Source leakage current
Gate-to-Source forward leakage
Total gate charge
Gate-to-Source charge
Gate-to-Drain("Miller") charge
Turn-on delay time
Rise time
Turn-Off delay time
Fall time
Input capacitance
Output capacitance
Reverse transfer capacitance
Min.
60
—
—
2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ.
—
2.7
4.6
—
1.98
—
—
—
—
179
34
73
27
101
83
122
7889
765
623
Max.
—
3.5
—
4
—
1
50
100
-100
—
—
—
—
—
—
—
—
—
—
pF
ns
nC
Units
V
mΩ
V
μA
nA
Conditions
V
GS
= 0V, ID = 250μA
V
GS
=10V,I
D
= 75A
T
J
= 125℃
V
DS
= V
GS
, I
D
= 150μA
T
J
= 125℃
V
DS
= 75V,V
GS
= 0V
T
J
= 125°C
V
GS
=20V
V
GS
= -20V
I
D
= 75A,
V
DS
=30V,
V
GS
= 10V
V
GS
=10V, VDS=35.3V,
R
L
=0.47Ω,
R
GEN
=2.7Ω
ID=75A
V
GS
= 0V
V
DS
= 50V
ƒ = 700KHz
Source-Drain Ratings and Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Min.
—
—
—
—
—
Typ.
—
—
0.9
36
44
Max.
160
640
1.3
—
—
Units
A
A
V
ns
nC
Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
I
S
=75A, V
GS
=0V
T
J
= 25°C, I
F
=75A,
di/dt = 100A/μs
©
Silikron Semiconductor CO.,LTD.
2013.08.13
www.silikron.com
Version : 1.1
page 2 of 8
SSF6005
Test circuits and Waveforms
EAS Test Circuit:
Gate charge test circuit:
Switching Time Test Circuit:
Switching Waveforms:
Notes:
①Calculated
continuous current based on maximum allowable junction temperature.
②
Repetitive rating; pulse width limited by max. junction temperature.
③The
power dissipation PD is based on max. junction temperature, using junction-to-case thermal
resistance.
④The
value of
R
θJA
is measured with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a
still air environment with TA =25°C
©
Silikron Semiconductor CO.,LTD.
2013.08.13
www.silikron.com
Version : 1.1
page 3 of 8
SSF6005
Typical electrical and thermal characteristics
Figure 1: Typical Output Characteristics
Figure 3. Drain-to-Source Breakdown Voltage vs.
Temperature
Figure 2.
Gate to source cut‐off voltage
Figure 4: Normalized On-Resistance Vs. Case
Temperature
©
Silikron Semiconductor CO.,LTD.
2013.08.13
www.silikron.com
Version : 1.1
page 4 of 8
SSF6005
Typical electrical and thermal characteristics
Figure 5. Maximum Drain Current Vs. Case
Temperature
Figure 6.Typical Capacitance Vs. Drain-to-Source
Voltage
Figure7. Maximum Effective Transient Thermal Impedance, Junction-to-Case
©
Silikron Semiconductor CO.,LTD.
2013.08.13
www.silikron.com
Version : 1.1
page 5 of 8
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