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IPS042GTR

Description
1.1 A BUF OR INV BASED PRPHL DRVR, PDSO8
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size92KB,10 Pages
ManufacturerInternational Rectifier ( Infineon )
Websitehttp://www.irf.com/
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IPS042GTR Overview

1.1 A BUF OR INV BASED PRPHL DRVR, PDSO8

IPS042GTR Parametric

Parameter NameAttribute value
MakerInternational Rectifier ( Infineon )
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codecompli
ECCN codeEAR99
Built-in protectionTRANSIENT; OVER CURRENT; THERMAL
Interface integrated circuit typeBUFFER OR INVERTER BASED PERIPHERAL DRIVER
JESD-30 codeR-PDSO-G8
length4.9 mm
Number of functions1
Number of terminals8
Output current flow directionSINK
Nominal output peak current1.1 A
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Certification statusNot Qualified
Maximum seat height1.75 mm
Nominal supply voltage14 V
surface mountYES
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
width3.9 mm
Base Number Matches1
Data Sheet No.PD 60153-J
IPS042G
DUAL FULLY PROTECTED POWER MOSFET SWITCH
Features
Over temperature shutdown
Over current shutdown
Active clamp
Low current & logic level input
E.S.D protection
Product Summary
R
ds(on)
V
clamp
I
shutdown
T
on
/T
off
500m
(max)
50V
2A
1.5µs
Description
The IPS042G is a fully protected dual low side SMART
POWER MOSFET that features over-current, over-tem-
perature, ESD protection and drain to source active
clamp.This device combines a HEXFET® POWER
MOSFET and a gate driver. It offers full protection
and high reliability required in harsh environments.
The driver allows short switching times and provides
efficient protection by turning OFF the power MOSFET
when the temperature exceeds 165
o
C or when the
drain current reaches 2A. This device restarts once
the input is cycled. The avalanche capability is
significantly enhanced by the active clamp and cov-
ers most inductive load demagnetizations.
Package
8-Lead SOIC
Typical Connection
Load
R in series
(if needed)
Q
D
IN
control
S
S
Logic signal
(Refer to lead assignment for correct pin configuration)
www.irf.com
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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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