ST7PMC2S4TC/XXX datasheet, PDF - EEWORLD Datasheet

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ST7PMC2S4TC/XXX: Description8-BIT, MROM, 8MHz, MICROCONTROLLER, PQFP44, 10 X 10 MM, ROHS COMPLIANT, LQFP-44; CategoryThe embedded processor and controller Microcontrollers and processors; File Size6MB，371 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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ST7PMC2S4TC/XXX Overview

8-BIT, MROM, 8MHz, MICROCONTROLLER, PQFP44, 10 X 10 MM, ROHS COMPLIANT, LQFP-44

ST7PMC2S4TC/XXX Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Objectid	1600720027
Parts packaging code	QFP
package instruction	10 X 10 MM, ROHS COMPLIANT, LQFP-44
Contacts	44
Reach Compliance Code	compliant
Has ADC	YES
Address bus width
bit size	8
CPU series	ST72
maximum clock frequency	16 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	S-PQFP-G44
JESD-609 code	e3
length	10 mm
Number of I/O lines	26
Number of terminals	44
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP44,.47SQ,32
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Certification status	Not Qualified
RAM (bytes)	768
rom(word)	16384
ROM programmability	MROM
Maximum seat height	1.6 mm
speed	8 MHz
Maximum slew rate	18 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	3.8 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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ST7MC1K2-Auto, ST7MC1K6-Auto

ST7MC2S4-Auto, ST7MC2S6-Auto

8-bit MCU for automotive with nested interrupts, Flash, 10-bit ADC,

brushless motor control, 5 timers, SPI, LINSCI™

Features

■

Memories

– 8 to 32 Kbyte dual voltage Flash program

memory or ROM with read-out protection

capability, in-application programming and

in-circuit programming

– 384 to 1 Kbyte RAM

– HDFlash endurance: 100 cycles, data

retention 40 years at 85°C

Clock, reset and supply management

– Enhanced reset system

– Enhanced low voltage supervisor (LVD) for

main supply and auxiliary voltage detector

(AVD) with interrupt capability

– Clock sources: crystal/ceramic resonator

oscillators and by-pass for external clock,

clock security system.

– 4 power saving modes: Halt, Active Halt,

Wait and Slow

Interrupt management

– Nested interrupt controller

– 14 interrupt vectors plus TRAP and reset

– MCES top level interrupt pin

– 16 external interrupt lines (on 3 vectors)

Up to 34 I/O ports

– Up to 34 multifunctional bidirectional I/O

lines

– Up to 10 high sink outputs

LQFP32 7 x 7

LQFP44 10 x 10

■

■

2 communication interfaces

– SPI synchronous serial interface

– LINSCI™ asynchronous serial interface

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Brushless motor control peripheral

– 6 high sink PWM output channels for

sinewave or trapezoidal inverter control

– Motor safety including asynchronous

emergency stop and write-once registers

– 4 analog inputs for rotor position detection

(sensorless/hall/tacho/encoder)

– Permanent magnet motor coprocessor

including multiplier, programmable filters,

blanking windows and event counters

– Operational amplifier and comparator for

current/voltage mode regulation and

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Analog peripheral

– 10-bit ADC with up to 11 input pins

In-circuit debug

Instruction set

– 8-bit data manipulation

– 63 basic instructions with illegal opcode

detection

– 17 main addressing modes

– 8x8 unsigned multiply instruction

– True bit manipulation

Development tools

– Full hardware/software development

package

5 timers

– Main clock controller with: real-time base,

beep and clock-out capabilities

– Configurable window watchdog timer

– Two 16-bit timers with: 2 input captures, 2

output compares, external clock input,

PWM and pulse generator modes

– 8-bit PWM auto-reload timer with: 2 input

captures, 4 PWM outputs, output compare

and time base interrupt, external clock with

event detector

■

July 2007

Rev 1

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www.st.com

1

Contents

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

Contents

1

2

3

4

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Register and memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Flash program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.3.1

Read-out protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

ICC interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

ICP (in-circuit programming) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

IAP (in-application programming) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Related documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Flash control status register (FCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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5.1

5.2

5.3

5.3.1

5.3.2

5.3.3

5.3.4

5.3.5

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Central processing unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

CPU registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Accumulator (A) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Index registers (X and Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Program counter (PC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Condition code register (CC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Stack pointer register (SP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

6

Supply, reset and clock management . . . . . . . . . . . . . . . . . . . . . . . . . . 42

6.1

6.2

6.3

6.4

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

6.3.1

External clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Reset sequence manager (RSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

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6.4.1

6.4.2

6.4.3

6.4.4

6.4.5

Contents

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Asynchronous external RESET pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

External power-on reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Internal low voltage detector (LVD) reset . . . . . . . . . . . . . . . . . . . . . . . . 46

Internal watchdog reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

6.5

System integrity management (SI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

6.5.1

6.5.2

6.5.3

6.5.4

6.5.5

6.5.6

Low voltage detector (LVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Auxiliary voltage detector (AVD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

Clock security system (CSS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

System integrity control/status register (SICSR, page 0) . . . . . . . . . . . 51

System integrity control/status register (SICSR, page 1) . . . . . . . . . . . 53

6.6

Main clock controller with real time clock and beeper (MCC/RTC) . . . . . 54

6.6.1

6.6.2

6.6.3

6.6.4

6.6.5

6.6.6

6.6.7

Programmable CPU clock prescaler . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Clock-out capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Real time clock timer (RTC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

MCC control status register (MCCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . 56

MCC beep control register (MCCBCR) . . . . . . . . . . . . . . . . . . . . . . . . . 58

Main clock controller register map and reset values . . . . . . . . . . . . . . . 58

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6.6.9

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Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

7.1

7.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Masking and processing flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

7.2.1

7.2.2

Servicing pending interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Different interrupt vector sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Non-maskable sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

Maskable sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

7.2.3

7.2.4

7.3

Interrupts and low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

Concurrent and nested management . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

7.5.1

7.5.2

CPU CC register interrupt bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

Interrupt software priority registers (ISPRX) . . . . . . . . . . . . . . . . . . . . . 65

7.4

7.5

Interrupt registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

7.6

Interrupt instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

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Contents

ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto

7.7

External interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

7.7.1

7.7.2

I/O port interrupt sensitivity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

External interrupt control register (EICR) . . . . . . . . . . . . . . . . . . . . . . . . 68

7.8

7.9

Nested interrupts register map and reset values . . . . . . . . . . . . . . . . . . . 69

Interrupt addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

8

Power saving modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

8.1

8.2

8.3

8.4

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Slow mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Active Halt and Halt modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

8.4.1

8.4.2

Active Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Halt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

9

I/O ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

9.1

9.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

9.2.1

9.2.2

9.2.3

Input modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Output modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

Alternate functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

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9.3

9.4

9.5

9.6

9.5.1

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I/O port implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

I/O port implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

I/O port register map and reset values . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

10

On-chip peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

10.1.1

10.1.2

10.1.3

10.1.4

10.1.5

10.1.6

10.1.7

10.1.8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

Using Halt mode with the watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Hardware watchdog option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

Using Halt mode with the watchdog (WDGHALT option) . . . . . . . . . . . . 91

10.1

How to program the watchdog timeout . . . . . . . . . . . . . . . . . . . . . . . . . 88

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10.1.9

Contents

Watchdog interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

10.1.10 Watchdog control register (WDGCR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

10.1.11 Watchdog window register (WDGWR) . . . . . . . . . . . . . . . . . . . . . . . . . . 91

10.1.12 Watchdog timer register map and reset values . . . . . . . . . . . . . . . . . . . 92

10.2

PWM auto-reload timer (ART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

10.2.1

10.2.2

10.2.3

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

PWM ART registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98

10.3

16-bit timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

10.3.1

10.3.2

10.3.3

10.3.4

10.3.5

10.3.6

10.3.7

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104

Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

Summary of 16-bit timer modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

16-bit timer registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119

10.4

Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

10.4.1

10.4.2

10.4.3

10.4.4

10.4.5

10.4.6

10.4.7

10.4.8

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

Main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

General description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127

Clock phase and clock polarity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131

Error flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135

SPI registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

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10.5

10.5.1

10.5.2

10.5.3

10.5.4

10.5.5

10.5.6

10.5.7

10.5.8

10.5.9

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LINSCI serial communication interface (LIN master/slave) . . . . . . . . . . 139

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

SCI features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

LIN features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

SCI mode - functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

Low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151

SCI mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152

LIN mode - functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151

LINSCI serial communication interface - general description . . . . . . . 141

10.5.10 LIN mode registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

10.5.11 LIN divider (LDIV) registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176

5/371

ST7PMC2S4TC/XXX Related Products

	ST7PMC2S4TC/XXX	ST7FMC1K6TCE	ST7FMC2S4TCE	ST7MC2S4TC/XXX	ST7MC1K2TC/XXX	ST7PMC2S6TC/XXX
Description	8-BIT, MROM, 8MHz, MICROCONTROLLER, PQFP44, 10 X 10 MM, ROHS COMPLIANT, LQFP-44	IC MCU 8BIT 32KB FLASH 32LQFP	IC MCU 8BIT 16KB FLASH 44LQFP	8-BIT, MROM, 8MHz, MICROCONTROLLER, PQFP44, 10 X 10 MM, ROHS COMPLIANT, LQFP-44	8-BIT, MROM, 8MHz, MICROCONTROLLER, PQFP32, 7 X 7 MM, ROHS COMPLIANT, LQFP-32	8-BIT, MROM, 8MHz, MICROCONTROLLER, PQFP44, 10 X 10 MM, ROHS COMPLIANT, LQFP-44
speed	8 MHz	8MHz	8MHz	8 MHz	8 MHz	8 MHz
Is it lead-free?	Lead free	-	-	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	-	-	conform to	conform to	conform to
Parts packaging code	QFP	-	-	QFP	QFP	QFP
package instruction	10 X 10 MM, ROHS COMPLIANT, LQFP-44	-	-	10 X 10 MM, ROHS COMPLIANT, LQFP-44	7 X 7 MM, ROHS COMPLIANT, LQFP-32	10 X 10 MM, ROHS COMPLIANT, LQFP-44
Contacts	44	-	-	44	32	44
Reach Compliance Code	compliant	-	-	compliant	compliant	compli
Has ADC	YES	-	-	YES	YES	YES
bit size	8	-	-	8	8	8
CPU series	ST72	-	-	ST72	ST72	ST72
maximum clock frequency	16 MHz	-	-	16 MHz	16 MHz	16 MHz
DAC channel	NO	-	-	NO	NO	NO
DMA channel	NO	-	-	NO	NO	NO
JESD-30 code	S-PQFP-G44	-	-	S-PQFP-G44	S-PQFP-G32	S-PQFP-G44
JESD-609 code	e3	-	-	e3	e3	e3
length	10 mm	-	-	10 mm	7 mm	10 mm
Number of I/O lines	26	-	-	26	17	26
Number of terminals	44	-	-	44	32	44
Maximum operating temperature	125 °C	-	-	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-	-	-40 °C	-40 °C	-40 °C
PWM channel	YES	-	-	YES	YES	YES
Package body material	PLASTIC/EPOXY	-	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	LQFP	-	-	LQFP	LQFP	LQFP
Encapsulate equivalent code	QFP44,.47SQ,32	-	-	QFP44,.47SQ,32	QFP32,.35SQ,32	QFP44,.47SQ,32
Package shape	SQUARE	-	-	SQUARE	SQUARE	SQUARE
Package form	FLATPACK, LOW PROFILE	-	-	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	260	-	-	260	260	260
power supply	5 V	-	-	5 V	5 V	5 V
Certification status	Not Qualified	-	-	Not Qualified	Not Qualified	Not Qualified
RAM (bytes)	768	-	-	768	384	1024
rom(word)	16384	-	-	16384	8192	32768
ROM programmability	MROM	-	-	MROM	MROM	MROM
Maximum seat height	1.6 mm	-	-	1.6 mm	1.6 mm	1.6 mm
Maximum slew rate	18 mA	-	-	18 mA	18 mA	18 mA
Maximum supply voltage	5.5 V	-	-	5.5 V	5.5 V	5.5 V
Minimum supply voltage	3.8 V	-	-	3.8 V	3.8 V	3.8 V
Nominal supply voltage	5 V	-	-	5 V	5 V	5 V
surface mount	YES	-	-	YES	YES	YES
technology	CMOS	-	-	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	-	-	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Tin (Sn)	-	-	Tin (Sn)	Matte Tin (Sn)	Tin (Sn)
Terminal form	GULL WING	-	-	GULL WING	GULL WING	GULL WING
Terminal pitch	0.8 mm	-	-	0.8 mm	0.8 mm	0.8 mm
Terminal location	QUAD	-	-	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	-	-	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10 mm	-	-	10 mm	7 mm	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER	-	-	MICROCONTROLLER	MICROCONTROLLER	MICROCONTROLLER

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