ISP1105/1106
Advanced USB transceivers
Rev. 10 — 28 September 2009
Product data sheet
1. General description
The ISP1105/1106 range of Universal Serial Bus (USB) transceivers are compliant with
the
Universal Serial Bus Specification Rev. 2.0.
They can transmit and receive serial data
at both full-speed (12 Mbit/s) and low-speed (1.5 Mbit/s) data rates. The ISP1105/1106
range can be used as a USB device transceiver or a USB host transceiver.
They allow USB Application Specific ICs (ASICs) and Programmable Logic Devices
(PLDs) with power supply voltages from 1.65 V to 3.6 V to interface with the physical layer
of the Universal Serial Bus. They have an integrated 5 V-to-3.3 V voltage regulator for
direct powering via the USB supply V
BUS
.
ISP1105 allows single-ended and differential input modes selectable by a MODE input
and it is available in HVQFN16 and HBCC16 packages. ISP1106 allows only differential
input mode and is available in both TSSOP16 and HBCC16 packages.
The ISP1105/1106 are ideal for portable electronics devices such as mobile phones,
digital still cameras, Personal Digital Assistants (PDA) and Information Appliances (IA).
2. Features
Complies with
Universal Serial Bus Specification Rev. 2.0
Can transmit and receive serial data at both full-speed (12 Mbit/s) and low-speed
(1.5 Mbit/s) data rates
Integrated bypassable 5 V-to-3.3 V voltage regulator for powering via USB V
BUS
V
BUS
disconnection indication through VP and VM
Used as a USB device transceiver or a USB host transceiver
Stable RCV output during SE0 condition
Two single-ended receivers with hysteresis
Low-power operation
Supports an I/O voltage range from 1.65 V to 3.6 V
±12
kV ESD protection at the D+, D−, V
CC(5.0)
and GND pins
Full industrial operating temperature range from
−40 °C
to
+85 °C
Available in small HBCC16, HVQFN16 (only ISP1105) and TSSOP16 (only ISP1106)
packages
The ISP1105 HBCC16 and HVQFN16 are lead-free and halogen-free.
The ISP1106 HBCC16 is lead-free.
ISP1105/1106
Advanced USB transceivers
3. Applications
Portable electronic devices, such as:
Mobile phone
Digital still camera
Personal Digital Assistant (PDA)
Information Appliance (IA).
4. Ordering information
Table 1.
Ordering information
Package description
Packing
Minimum
sellable quantity
6000 pieces
1400 pieces
6000 pieces
1400 pieces
2500 pieces
Commercial
product code
ISP1105WTS
ISP1105WTM
ISP1106WTS
ISP1105BSTM HVQFN16; 16 terminals; body 3
×
3
×
0.85 mm 13 inch tape and reel non-dry pack
HBCC16; 16 terminals; body 3
×
3
×
0.65 mm
HBCC16; 16 terminals; body 3
×
3
×
0.65 mm
HBCC16; 16 terminals; body 3
×
3
×
0.65 mm
7 inch tape and reel non-dry pack
13 inch tape and reel non-dry pack
7 inch tape and reel non-dry pack
13 inch tape and reel non-dry pack
ISP1106DHTM TSSOP16; 16 leads; body width 4.4 mm
4.1 Ordering options
Table 2.
Product
ISP1105
ISP1106
Selection guide
Package
Description
HVQFN16 and HBCC16 supports both single-ended and differential input modes; see
Table 5
and
Table 6.
TSSOP16 and HBCC16
supports only the differential input mode; see
Table 6.
ISP1105_1106_10
© ST-ERICSSON 2009. All rights reserved.
Product data sheet
Rev. 10 — 28 September 2009
2 of 25
ISP1105/1106
Advanced USB transceivers
5. Block diagram
3.3 V
V
CC(I/O)
VOLTAGE
REGULATOR
V
CC(5.0)
V
reg(3.3)
SOFTCON
OE
SPEED
VMO/FSE0
(2)
VPO/VO
(2)
MODE
(3)
SUSPND
RCV
LEVEL
SHIFTER
V
pu(3.3)
1.5 kΩ
(1)
D+
D−
33
Ω
(1%)
33
Ω
(1%)
ISP1105
ISP1106
VP
VM
mbl301
GND
(1) Connect to D− for low-speed operation.
(2) Pin function depends on device type.
(3) Only for ISP1105.
Fig 1.
Block diagram (combined ISP1105 and ISP1106).
ISP1105_1106_10
© ST-ERICSSON 2009. All rights reserved.
Product data sheet
Rev. 10 — 28 September 2009
3 of 25
ISP1105/1106
Advanced USB transceivers
6. Pinning information
6.1 Pinning
SUSPND
VCC(I/O)
VCC(I/O)
7
SPEED
8
SPEED
MODE
5
VM
VP
RCV
4
3
2
6
7
8
9
10
11
12
D−
SUSPND
5
6
MODE
9
D−
VM
4
3
2
10
D+
VPO/VO
VMO/FSE0
ISP1105BSTM
GND
(exposed diepad)
D+
VP
VPO/VO
RCV
VMO/FSE0
OE
1
ISP1105WTS
ISP1105WTM
GND
(exposed diepad)
11
12
OE 1
16
SOFTCON
Bottom view
15
Vpu(3.3)
14
VCC(5.0)
13
Vreg(3.3)
16
SOFTCON
15
Vpu(3.3)
14
VCC(5.0)
13
Vreg(3.3)
004aaa314
Bottom view
MBL303
Fig 2.
Pin configuration ISP1105BSTM (HVQFN).
Fig 3.
Pin configuration ISP1105WTS and
ISP1105WTM (HBCC16).
VCC(I/O)
7
Vpu(3.3) 1
SOFTCON 2
OE 3
RCV 4
VP 5
VM 6
SUSPND 7
GND 8
MBL302
16 VCC(5.0)
15 Vreg(3.3)
14 VMO
VM
4
3
2
SUSPND
5
6
GND
SPEED
8
9
D−
10
D+
VPO
VMO
ISP1106DHTM
13 VPO
12 D+
11 D−
10 SPEED
OE
9 V CC(I/O)
Bottom view
VP
RCV
ISP1106WTS
11
12
1
16
SOFTCON
15
Vpu(3.3)
14
VCC(5.0)
13
Vreg(3.3)
MBL304
Fig 4.
Pin configuration ISP1106DHTM (TSSOP16).
Fig 5.
Pin configuration ISP1106WTS (HBCC16).
ISP1105_1106_10
© ST-ERICSSON 2009. All rights reserved.
Product data sheet
Rev. 10 — 28 September 2009
4 of 25
ISP1105/1106
Advanced USB transceivers
6.2 Pin description
Table 3.
Symbol
[1]
Pin description
Pin
ISP1105
ISP1106
BSTM WTS, DHTM WTS
WTM
OE
1
1
3
1
I
output enable input (CMOS level with respect to V
CC(I/O)
, active LOW);
enables the transceiver to transmit data on the USB bus
input pad; push pull; CMOS
RCV
2
2
4
2
O
differential data receiver output (CMOS level with respect to V
CC(I/O)
);
driven LOW when input SUSPND is HIGH; the output state of RCV is
preserved and stable during an SE0 condition
output pad; push pull; 4 mA output drive; CMOS
VP
3
3
5
3
O
single-ended D+ receiver output (CMOS level with respect to V
CC(I/O)
);
for external detection of single-ended zero (SE0), error conditions,
speed of connected device; driven HIGH when no supply voltage is
connected to V
CC(5.0)
and V
reg(3.3)
output pad; push pull; 4 mA output drive; CMOS
VM
4
4
6
4
O
single-ended D− receiver output (CMOS level with respect to V
CC(I/O)
);
for external detection of single-ended zero (SE0), error conditions,
speed of connected device; driven HIGH when no supply voltage is
connected to V
CC(5.0)
and V
reg(3.3)
output pad; push pull; 4 mA output drive; CMOS
SUSPND
5
5
7
5
I
suspend input (CMOS level with respect to V
CC(I/O)
); a HIGH level
enables low-power state while the USB bus is inactive and drives
output RCV to a LOW level
input pad; push pull; CMOS
MODE
6
6
-
-
I
mode input (CMOS level with respect to V
CC(I/O)
); a HIGH level
enables the differential input mode (VPO, VMO) whereas a LOW level
enables a single-ended input mode (VO, FSE0); see
Table 5
and
Table 6
input pad; push pull; CMOS
GND
V
CC(I/O)
die
pad
7
die
pad
7
8
9
6
7
-
-
ground supply
[2]
supply voltage for digital I/O pins (1.65 V to 3.6 V). When V
CC(I/O)
is
not connected, the (D+, D−) pins are in three-state; this supply pin is
totally independent of V
CC(5.0)
and V
reg(3.3)
and must never exceed the
V
reg(3.3)
voltage
speed selection input (CMOS level with respect to V
CC(I/O)
); adjusts
the slew rate of differential data outputs D+ and D− according to the
transmission speed
LOW —
low-speed (1.5 Mbit/s)
HIGH —
full-speed (12 Mbit/s)
input pad; push pull; CMOS
D−
D+
9
10
9
10
11
12
9
10
AI/O negative USB data bus connection (analog, differential); for low-speed
mode connect to pin V
pu(3.3)
via a 1.5 kΩ resistor
AI/O positive USB data bus connection (analog, differential); for full-speed
mode connect to pin V
pu(3.3)
via a 1.5 kΩ resistor
Type Description
SPEED
8
8
10
8
I
ISP1105_1106_10
© ST-ERICSSON 2009. All rights reserved.
Product data sheet
Rev. 10 — 28 September 2009
5 of 25
京公网安备 11010802033920号
EEWORLD
