BSTS-218-D-A-10-GT-120-LT datasheet, PDF

BSTS-218-D-A-10-GT-120-LT: DescriptionBoard Connector, 36 Contact(s), 2 Row(s), Male, Straight, 0.079 inch Pitch, Solder Kinked Leads Terminal, Black Insulator, Receptacle; CategoryThe connector The connector; File Size181KB，1 Pages; ManufacturerMajor League Electronics; Websitehttp://www.mlelectronics.com/

Download Datasheet Parametric View All

BSTS-218-D-A-10-GT-120-LT Overview

Board Connector, 36 Contact(s), 2 Row(s), Male, Straight, 0.079 inch Pitch, Solder Kinked Leads Terminal, Black Insulator, Receptacle

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Objectid	1164462118
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	BOARD STACKING CONNECTOR
body width	0.158 inch
subject depth	0.12 inch
body length	1.422 inch
Body/casing type	RECEPTACLE
Connector type	BOARD CONNECTOR
Contact to complete cooperation	GOLD (10) OVER NICKEL (50)
Contact completed and terminated	Tin/Lead (Sn/Pb) - with Nickel (Ni) barrier
Contact point gender	MALE
Contact material	PHOSPHOR BRONZE
contact mode	RECTANGULAR
Contact style	SQ PIN-SKT
Insulation resistance	5000000000 Ω
Insulator color	BLACK
insulator material	GLASS FILLED POLYESTER
JESD-609 code	e0
Manufacturer's serial number	BSTS
Plug contact pitch	0.079 inch
Match contact row spacing	0.079 inch
Installation method	STRAIGHT
Installation type	BOARD
Number of connectors	ONE
PCB row number	2
Number of rows loaded	2
Maximum operating temperature	125 °C
Minimum operating temperature	-65 °C
PCB contact pattern	RECTANGULAR
PCB contact row spacing	2.0066 mm
Plating thickness	10u inch
Rated current (signal)	2 A
Guideline	UL
reliability	COMMERCIAL
Terminal length	0.09 inch
Terminal pitch	2.0066 mm
Termination type	SOLDER KINKED LEADS
Total number of contacts	36

Signal Generator and DA Conversion FPGA Case Tutorial: Signal Generator and DA Conversion FPGA Case Tutorial...; mdy-吴伟杰 FPGA/CPLD

How to choose FPGA development board for beginners: I have been working for nearly eight years, and have been engaged in C development. I have a deep understanding of OS, and have written TCP/IP protocol stacks and slab kernels. Now I am very intereste...; yunhaid FPGA/CPLD

About Embedded PCI Cards: Our PCI card has uclinux operating system, which can be configured in master-slave mode. Now it is configured in slave mode and plugged into a PC. The card has been burned with redboot, kernel and fil...; happepipi Embedded System

A picture book about people and the environment~~: A few days ago, there was a post talking about smog and environmental protection. Yesterday, my child suddenly mentioned a book title. After looking at the content, I felt that it was related. I would...; soso Talking

Hardware Design Guide for TMS320F28xx and TMS320F28xxx DSCs: Hardware Design Guide for TMS320F28xx and TMS320F28xxx DSCs...; fish001 DSP and ARM Processors

The program runs in SDRAM, how to configure the SCT file?: I want to run an independent executable program in SRAM. The approach I take is as follows: 1. First write a simple copy program and run it in the on-chip FLASH. It is responsible for copying the new ...; zyzs50 NXP MCU

Shortcut: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components