PD -
96203
IRFS4620PbF
IRFSL4620PbF
HEXFET
®
Power MOSFET
Applications
l
High Efficiency Synchronous Rectification in SMPS
l
Uninterruptible Power Supply
l
High Speed Power Switching
l
Hard Switched and High Frequency Circuits
Benefits
l
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l
Fully Characterized Capacitance and Avalanche
SOA
l
Enhanced body diode dV/dt and dI/dt Capability
l
Lead-Free
D
G
S
V
DSS
R
DS(on)
typ.
max.
I
D
D
200V
63.7m
:
77.5m
:
24A
D
S
G
G
D
S
D
2
Pak
IRFS4620PbF
TO-262
IRFSL4620PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
DM
P
D
@T
C
= 25°C
V
GS
dv/dt
T
J
T
STG
Parameter
Continuous Drain Current, V
GS
@ 10V
Continuous Drain Current, V
GS
@ 10V
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
Max.
24
17
100
144
0.96
± 20
54
-55 to + 175
300
Units
A
W
W/°C
V
V/ns
c
e
°C
Avalanche Characteristics
E
AS (Thermally limited)
I
AR
E
AR
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
c
d
c
i
113
See Fig. 14, 15, 22a, 22b,
mJ
A
mJ
Thermal Resistance
Symbol
R
θJC
R
θJA
Junction-to-Case
Junction-to-Ambient (PCB Mount)
j
Parameter
Typ.
–––
–––
Max.
1.045
40
Units
°C/W
www.irf.com
1
12/18/08
IRFS/SL4620PbF
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
V
(BR)DSS
∆V
(BR)DSS
/∆T
J
R
DS(on)
V
GS(th)
I
DSS
I
GSS
R
G(int)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
Min. Typ. Max. Units
200
–––
–––
3.0
–––
–––
–––
–––
–––
Conditions
–––
0.23
63.7
–––
–––
–––
–––
–––
2.6
–––
V V
GS
= 0V, I
D
= 250µA
––– V/°C Reference to 25°C, I
D
= 5mA
77.5 mΩ V
GS
= 10V, I
D
= 15A
5.0
V V
DS
= V
GS
, I
D
= 100µA
V
DS
= 200V, V
GS
= 0V
20
µA
250
V
DS
= 200V, V
GS
= 0V, T
J
= 125°C
100
V
GS
= 20V
nA
V
GS
= -20V
-100
f
–––
Ω
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
gfs
Q
g
Q
gs
Q
gd
Q
sync
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
eff. (ER)
C
oss
eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
37
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
25
8.2
7.9
17
13.4
22.4
25.4
14.8
1710
125
30
113
317
–––
38
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
Conditions
g
hÃ
V
DS
= 50V, I
D
= 15A
I
D
= 15A
V
DS
= 100V
nC
V
GS
= 10V
I
D
= 15A, V
DS
=0V, V
GS
= 10V
V
DD
= 130V
I
D
= 15A
ns
R
G
= 7.3Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 50V
pF ƒ = 1.0MHz (See Fig.5)
V
GS
= 0V, V
DS
= 0V to 160V (See Fig.11)
V
GS
= 0V, V
DS
= 0V to 160V
f
f
h
g
Diode Characteristics
Symbol
I
S
I
SM
V
SD
t
rr
Q
rr
I
RRM
t
on
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Min. Typ. Max. Units
–––
–––
–––
–––
24
A
100
Conditions
MOSFET symbol
showing the
integral reverse
G
D
Ã
Reverse Recovery Charge
Reverse Recovery Current
Forward Turn-On Time
––– –––
1.3
V
–––
78
–––
ns
–––
99
–––
––– 294 –––
nC
T
J
= 125°C
––– 432 –––
–––
7.6
–––
A T
J
= 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
p-n junction diode.
T
J
= 25°C, I
S
= 15A, V
GS
= 0V
T
J
= 25°C
V
R
= 100V,
T
J
= 125°C
I
F
= 15A
di/dt = 100A/µs
T
J
= 25°C
f
S
f
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 1.0mH
R
G
= 25Ω, I
AS
= 15A, V
GS
=10V. Part not recommended for use
above this value .
I
SD
≤
15A, di/dt
≤
634A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C
2
www.irf.com
IRFS/SL4620PbF
1000
TOP
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
1000
TOP
VGS
15V
12V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
100
BOTTOM
10
BOTTOM
10
5.0V
1
5.0V
0.1
≤
60µs PULSE WIDTH
Tj = 25°C
0.01
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
1
≤
60µs PULSE WIDTH
Tj = 175°C
0.1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 2.
Typical Output Characteristics
3.5
3.0
2.5
2.0
1.5
1.0
0.5
ID = 15A
VGS = 10V
ID, Drain-to-Source Current (A)
100
TJ = 175°C
T J = 25°C
10
1
VDS = 50V
≤60µs
PULSE WIDTH
0.1
2
4
6
8
10
12
14
16
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 3.
Typical Transfer Characteristics
100000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
14.0
VGS, Gate-to-Source Voltage (V)
12.0
10.0
8.0
6.0
4.0
2.0
0.0
ID= 15A
10000
C, Capacitance (pF)
VDS= 160V
VDS= 100V
VDS= 40V
1000
Ciss
Coss
100
Crss
10
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
0
5
10
15
20
25
30
35
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFS/SL4620PbF
100
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
100µsec
1msec
T J = 175°C
10
T J = 25°C
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
10
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
10
100
1000
VGS = 0V
1.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
VSD, Source-to-Drain Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
30
25
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
VDS, Drain-to-Source Voltage (V)
260
Id = 5mA
250
240
230
220
210
200
190
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Temperature ( °C )
20
15
10
5
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
3.0
Fig 10.
Drain-to-Source Breakdown Voltage
500
EAS , Single Pulse Avalanche Energy (mJ)
2.5
2.0
450
400
350
300
250
200
150
100
50
0
25
50
75
100
ID
TOP
2.05A
2.94A
BOTTOM 15A
Energy (µJ)
1.5
1.0
0.5
0.0
-50
0
50
100
150
200
125
150
175
Fig 11.
Typical C
OSS
Stored Energy
VDS, Drain-to-Source Voltage (V)
Starting T J , Junction Temperature (°C)
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
4
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IRFS/SL4620PbF
10
Thermal Response ( Z thJC ) °C/W
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
0.0001
0.001
R
1
R
1
τ
J
τ
1
τ
2
R
2
R
2
τ
C
τ
1
τ
2
τ
0.1
τ
J
Ri (°C/W)
0.456
0.589
τi
(sec)
0.000311
0.003759
Ci=
τi/Ri
Ci i/Ri
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.01
0.1
0.001
1E-006
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
Duty Cycle = Single Pulse
Avalanche Current (A)
10
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Tj
= 150°C and
Tstart =25°C (Single Pulse)
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
∆Τ
j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
120
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 15A
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
∆T
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
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EAR , Avalanche Energy (mJ)
5
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