Quad 2-input positive-OR gates 14-PDIP 0 to 70
| Parameter Name | Attribute value |
| Brand Name | Texas Instruments |
| Is it Rohs certified? | conform to |
| Maker | Texas Instruments |
| Parts packaging code | DIP |
| package instruction | DIP, DIP14,.3 |
| Contacts | 14 |
| Reach Compliance Code | compli |
| ECCN code | EAR99 |
| Factory Lead Time | 1 week |
| Samacsys Descripti | QUADRUPLE 2-INPUT POSITIVE-OR GATES |
| series | S |
| JESD-30 code | R-PDIP-T14 |
| JESD-609 code | e4 |
| length | 19.305 mm |
| Load capacitance (CL) | 15 pF |
| Logic integrated circuit type | OR GATE |
| MaximumI(ol) | 0.016 A |
| Number of functions | 4 |
| Number of entries | 2 |
| Number of terminals | 14 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | DIP |
| Encapsulate equivalent code | DIP14,.3 |
| Package shape | RECTANGULAR |
| Package form | IN-LINE |
| method of packing | TUBE |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Maximum supply current (ICC) | 68 mA |
| Prop。Delay @ Nom-Su | 7 ns |
| propagation delay (tpd) | 7 ns |
| Certification status | Not Qualified |
| Schmitt trigger | NO |
| Maximum seat height | 5.08 mm |
| Maximum supply voltage (Vsup) | 5.25 V |
| Minimum supply voltage (Vsup) | 4.75 V |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | NO |
| technology | TTL |
| Temperature level | COMMERCIAL |
| Terminal surface | Nickel/Palladium/Gold (Ni/Pd/Au) |
| Terminal form | THROUGH-HOLE |
| Terminal pitch | 2.54 mm |
| Terminal location | DUAL |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 7.62 mm |
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