8403601JX datasheet, PDF - EEWORLD Datasheet

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8403601JX: Description2KX8 STANDARD SRAM, 200ns, CDIP24, CERAMIC, DIP-24; Categorystorage storage; File Size326KB，27 Pages; ManufacturerIntersil ( Renesas ); Websitehttp://www.intersil.com/cda/home/

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8403601JX Overview

2KX8 STANDARD SRAM, 200ns, CDIP24, CERAMIC, DIP-24

8403601JX Parametric

Parameter Name	Attribute value
Objectid	1515918398
Parts packaging code	DIP
package instruction	DIP, DIP24,.6
Contacts	24
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	200 ns
I/O type	COMMON
JESD-30 code	R-GDIP-T24
memory density	16384 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	24
word count	2048 words
character code	2000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	2KX8
Output characteristics	3-STATE
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum standby current	0.00005 A
Minimum standby current	2 V
Maximum slew rate	0.01 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL

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REVISIONS

LTR

DESCRIPTION

Change to vendor similar part number for vendor CAGE number

0SP21 for devices 08KX, 09KX, 10KX, 11KX, 12KX, 13KX, 14KX,

15KX, and 16KX. Remove vendor CAGE number 0SP21 from devices

08YX, 09YX, 10YX, 11YX, 12YX, 13YX, 15YX, and 16YX. Change to

vendor similar part number for vendor CAGE number 65786 for

devices 09 and 11. Add vendor CAGE number 50088 to the drawing

as a source of supply for devices 04JX and 05JX. Add vendor CAGE

number 65896 to the drawing as a source of supply for devices 15 and

16. Removed 4.3.3 from drawing. Editorial changes throughout.

Added provisions for the addition of QD certified parts to drawing.

Updated boilerplate. Added CAGE OC7V7 as supplier. - ksr

Correction to marking paragraph 3.5. Updated boilerplate paragraphs.

ksr

Boilerplate update, part of 5-year review. - ksr

Update to meet current MIL-PRF-38535 requirements. – glg

DATE (YR-MO-DA)

92-04-27

APPROVED

M. A. Frye

00-09-27

Raymond Monnin

05-03-11

Raymond Monnin

11-02-14

17-11-01

Charles F. Saffle

CURRENT CAGE CODE 67268

REV

SHEET

REV

SHEET

REV STATUS

OF SHEETS

PMIC N/A

REV

SHEET

PREPARED BY

Roger Mell

STANDARD

MICROCIRCUIT

DRAWING

THIS DRAWING IS

AVAILABLE

FOR USE BY ALL

DEPARTMENTS

AND AGENCIES OF THE

DEPARTMENT OF DEFENSE

AMSC N/A

CHECKED BY

D. A. DiCenzo

APPROVED BY

Nelson A. Hauck

DLA LAND AMD MARITIME

COLUMBUS, OHIO 43218-3990

http://www.dla.mil/landandmaritime

MICROCIRCUITS, MEMORY, DIGITAL,

CMOS, 16K (2048 X 8) BIT STATIC RAM,

MONOLITHIC SILICON

DRAWING APPROVAL DATE

84 – 08 - 24

REVISION LEVEL

SIZE

SHEET

CAGE CODE

14933

1 OF

84036

DSCC FORM 2233

APR 97

DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.

5962-E084-18

3. REQUIREMENTS

3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-

JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer

Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-

38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity

approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make

modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These

modifications shall not affect the PIN as described herein. A "Q" or "QML" certification mark in accordance with MIL-PRF-38535

is required to identify when the QML flow option is used. This drawing has been modified to allow the manufacturer to use the

alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or alternative approved by the Qualifying Activity.

3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified

in MIL-PRF-38535, appendix A and herein.

3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein and figure 1.

3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.

3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.

3.2.4 Logic diagram(s). The logic diagram(s) shall be as specified on figure 4.

3.2.5 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha particle protection only.

Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the

internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor

testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements

as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal.

3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are

as specified in table I and shall apply over the full case operating temperature range.

3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical

tests for each subgroup are described in table I.

3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN

listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked.

3.5.1 Certification/compliance mark. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535,

Appendix A. For Class Q product built in accordance with A.3.2.2 of MIL-PRF-38535 or other alternative approved by the

Qualifying Activity, the "QD" certification mark shall be used in place of the "QML" or "Q" certification mark.

3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an

approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and

Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturer's product meets the

requirements of MIL-PRF-38535, appendix A and the requirements herein.

3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided

with each lot of microcircuits delivered to this drawing.

3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that

affects this drawing.

3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime’s agent, and the acquiring activity retain the

option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made

available onshore at the option of the reviewer.

STANDARD

MICROCIRCUIT DRAWING

DLA LAND AMD MARITIME

COLUMBUS, OHIO 43218-3990

DSCC FORM 2234

APR 97

SIZE

REVISION LEVEL

84036

SHEET

8403601JX Related Products

	8403601JX	8403607JX
Description	2KX8 STANDARD SRAM, 200ns, CDIP24, CERAMIC, DIP-24	2KX8 STANDARD SRAM, 120ns, CDIP24, CERAMIC, DIP-24
Objectid	1515918398	1515928317
Parts packaging code	DIP	DIP
package instruction	DIP, DIP24,.6	DIP, DIP24,.6
Contacts	24	24
Reach Compliance Code	unknown	unknown
ECCN code	3A001.A.2.C	3A001.A.2.C
Maximum access time	200 ns	120 ns
I/O type	COMMON	COMMON
JESD-30 code	R-GDIP-T24	R-GDIP-T24
memory density	16384 bit	16384 bit
Memory IC Type	STANDARD SRAM	STANDARD SRAM
memory width	8	8
Number of functions	1	1
Number of terminals	24	24
word count	2048 words	2048 words
character code	2000	2000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
organize	2KX8	2KX8
Output characteristics	3-STATE	3-STATE
Package body material	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED
encapsulated code	DIP	DIP
Encapsulate equivalent code	DIP24,.6	DIP24,.6
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	IN-LINE
Parallel/Serial	PARALLEL	PARALLEL
power supply	5 V	5 V
Certification status	Not Qualified	Not Qualified
Filter level	MIL-STD-883	MIL-STD-883
Maximum standby current	0.00005 A	0.000025 A
Minimum standby current	2 V	2 V
Maximum slew rate	0.01 mA	0.01 mA
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	NO	NO
technology	CMOS	CMOS
Temperature level	MILITARY	MILITARY
Terminal form	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL

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