Data Sheet
FEATURES
Very low voltage noise: 1 nV/√Hz maximum at 100 Hz
Excellent current gain match: 0.5%
Low offset voltage (V
OS
): 200 μV maximum (SOIC)
Outstanding offset voltage drift: 0.03 μV/°C
High gain bandwidth product: 200 MHz
Audio, Dual-Matched
NPN Transistor
SSM2212
PIN CONNECTIONS
C
1 1
B
1 2
E
1 3
NIC
4
8
7
6
C
2
B
2
E
2
NIC
09043-001
SSM2212
5
NOTES
1. NIC = NO INTERNAL CONNECTION.
Figure 1. 8-Lead SOIC_N
16
NIC
14
NIC
15
B
1
13
C
1
12 NIC
11 C
2
10 NIC
9
NIC
E
1A
1
E
1B
2
E
2B
3
E
2A
4
SSM2212
NIC
8
NIC
7
NIC
5
B
2
6
NOTES
1. NIC = NO INTERNAL CONNECTION.
Figure 2. 16-Lead LFCSP_WQ
GENERAL DESCRIPTION
The
SSM2212
is a dual, NPN-matched transistor pair that is
specifically designed to meet the requirements of ultralow noise
audio systems.
With its extremely low input base spreading resistance (rbb' is
typically 28 Ω) and high current gain (h
FE
typically exceeds 600 at
I
C
= 1 mA), the
SSM2212
can achieve outstanding signal-to-noise
ratios. The high current gain results in superior performance
compared to systems incorporating commercially available
monolithic amplifiers.
Excellent matching of the current gain (Δh
FE
) to approximately
0.5% and low V
OS
of less than 10 μV typical make the
SSM2212
ideal for symmetrically balanced designs, which reduce high-
order amplifier harmonic distortion.
Stability of the matching parameters is guaranteed by protection
diodes across the base-emitter junction. These diodes prevent
degradation of beta and matching characteristics due to reverse
biasing of the base-emitter junction.
The
SSM2212
is also an ideal choice for accurate and reliable
current biasing and mirroring circuits. Furthermore, because
the accuracy of a current mirror degrades exponentially with
mismatches of V
BE
between transistor pairs, the low V
OS
of the
SSM2212
does not need offset trimming in most circuit
applications.
The
SSM2212
SOIC performance and characteristics are
guaranteed over the extended temperature range of −40°C to
+85°C.
The
SSM2212
is available in 8-lead SOIC and 16-lead LFCSP
packages.
Rev. C
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Trademarks and registered trademarks are the property of their respective owners.
09043-020
SSM2212
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Connections ............................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—SOIC Package ................................ 3
Electrical Characteristics—LFCSP Package .............................. 4
Absolute Maximum Rating ............................................................. 5
Data Sheet
Thermal Resistance .......................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Pin Configurations and Function Descriptions ............................9
Applications Information .............................................................. 10
Fast Logarithmic Amplifier....................................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
6/15—Rev. B to Rev. C
Added LFCSP Package ....................................................... Universal
Changes to Features Section and General Description Section....... 1
Changed Pin Configuration Section to Pin Connections Section .. 1
Added Figure 2; Renumbered Sequentially ....................................... 1
Added Electrical Characteristics—LFCSP Package Section and
Table 2; Renumbered Sequentially ...................................................... 4
Changes to Table 4 .................................................................................. 5
Added Pin Configurations and Function Descriptions Section,
Figure 17, Table 5, Figure 18, and Table 6 .......................................... 9
Added Figure 21.................................................................................... 11
Updated Outline Dimensions ............................................................ 11
Changes to Ordering Guide................................................................ 11
7/10—Rev. A to Rev. B
Changes to Figure 1 .......................................................................... 1
6/10—Rev. 0 to Rev. A
Changes to Fast Logarithmic Amplifier Section .......................... 8
6/10—Revision 0: Initial Version
Rev. C | Page 2 of 12
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—SOIC PACKAGE
V
CB
= 15 V, I
O
= 10 µA, T
A
= 25°C, unless otherwise specified.
Table 1.
Parameter
DC AND AC CHARACTERISTICS
Current Gain
1
Symbol
h
FE
I
C
= 1 mA
−40°C ≤ T
A
≤ +85°C
I
C
= 10 µA
−40°C ≤ T
A
≤ +85°C
10 µA ≤ I
C
≤ 1 mA
I
C
= 1 mA, V
CB
= 0 V
f
O
= 10 Hz
f
O
= 100 Hz
f
O
= 1 kHz
f
O
= 10 kHz
I
C
= 1 mA
V
CB
= 0 V, I
C
= 1 mA
−40°C ≤ T
A
≤ +85°C
0 V ≤ V
CB
≤ V
MAX4
,1 µA ≤ I
C
≤ 1 mA
5
1 µA ≤ I
C
≤ 1 mA
5
, V
CB
= 0 V
−40°C ≤ T
A
≤ +85°C
−40°C ≤ T
A
≤ +85°C, V
OS
trimmed to 0 V
I
C
= 10 mA, V
CE
= 10 V
V
CB
= V
MAX
−40°C ≤ T
A
≤ +85°C
V
CC
= V
MAX6, 7
−40°C ≤ T
A
≤ +85°C
V
CE
= V
MAX
, V
BE
= 0 V
6, 7
−40°C ≤ T
A
≤ +85°C
I
C
= 10 µA
−40°C ≤ T
A
≤ +85°C
I
C
= 10 µA
−40°C ≤ T
A
≤ +85°C
I
C
= 10 µA
6
, −40°C ≤ T
A
≤ +85°C
I
C
= 1 mA, I
B
= 100 µA
V
CB
= 15 V, I
E
= 0 µA
10 µA ≤ I
C
≤ 10 mA
6
V
CC
= 0 V
300
300
200
200
605
550
0.5
1.6
0.9
0.85
0.85
0.4
10
10
5
0.08
0.03
40
200
25
3
35
4
35
4
5
2
1
1
1
Test Conditions/Comments
Min
Typ
SSM2212
Max
Unit
Current Gain Match
2
Noise Voltage Density
3
Δh
FE
e
N
%
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µV p-p
µV
µV
µV
µV
µV/°C
µV/°C
V
MHz
pA
nA
pA
nA
pA
nA
nA
nA
nA
nA
pA/°C
V
pF
Ω
pF
Low Frequency Noise (0.1 Hz to 10 Hz)
Offset Voltage
Offset Voltage Change vs. V
CB
Offset Voltage Change vs. I
C
Offset Voltage Drift
Breakdown Voltage
Gain Bandwidth Product
Collector-to-Base Leakage Current
Collector-to-Collector Leakage Current
Collector-to-Emitter Leakage Current
Input Bias Current
Input Offset Current
Input Offset Current Drift
Collector Saturation Voltage
Output Capacitance
Bulk Resistance
Collector-to-Collector Capacitance
1
2
e
N
p-p
V
OS
ΔV
OS
/ΔV
CB
ΔV
OS
/ΔI
C
ΔV
OS
/ΔT
BV
CEO
f
T
I
CBO
I
CC
I
CES
I
B
I
OS
ΔI
OS
/ΔT
V
CE (SAT)
C
OB
R
BE
C
CC
200
220
50
70
1
0.3
500
500
500
50
50
6.2
13
150
0.2
1.6
40
0.05
23
0.3
35
Current gain is guaranteed with collector-to-base voltage (V
CB
) swept from 0 V to V
MAX
at the indicated collector currents.
Current gain match (Δh
FE
) is defined as follows: Δh
FE
= (100(ΔI
B
)(h
FE min
)/I
C
).
3
Noise voltage density is guaranteed, but not 100% tested.
4
This is the maximum change in V
OS
as V
CB
is swept from 0 V to 40 V.
5
Measured at I
C
= 10 µA and guaranteed by design over the specified range of I
C
.
6
Guaranteed by design.
7
I
CC
and I
CES
are verified by measurement of I
CBO
.
Rev. C | Page 3 of 12
SSM2212
ELECTRICAL CHARACTERISTICS—LFCSP PACKAGE
V
CB
= 15 V, I
O
= 100 µA, T
A
= 25°C, unless otherwise specified.
Table 2.
Parameter
DC AND AC CHARACTERISTICS
Current Gain
1
Symbol
h
FE
I
C
= 1 mA, V
CB
= 15 V
I
C
= 1 mA, V
CB
= 0 V
I
C
= 100 µA, V
CB
= 15 V
I
C
= 100 µA, V
CB
= 0 V
100 µA ≤ I
C
≤ 1 mA
I
C
= 1 mA, V
CB
= 0 V
f
O
= 10 Hz
f
O
= 100 Hz
f
O
= 1 kHz
f
O
= 10 kHz
I
C
= 1 mA
V
CB
= 0 V, I
C
= 1 mA
V
CB
= 0 V, I
C
= 100 µA
I
C
= 10 mA, V
CE
= 10 V
I
C
= 100 µA
I
C
= 100 µA
V
CB
= 15 V, I
E
= 0 µA
V
CC
= 0 V
300
200
350
250
1800
1300
2100
1500
0.5
1.6
0.9
0.85
0.85
0.4
25
10
200
Test Conditions/Comments
Min
Typ
Data Sheet
Max
Unit
Current Gain Match
2
Noise Voltage Density
3
Δh
FE
e
N
2400
2200
2500
2300
5
2
1
1
1
250
250
200
10
%
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µV p-p
µV
µV
MHz
nA
nA
pF
pF
Low Frequency Noise (0.1 Hz to 10 Hz)
Offset Voltage
Gain Bandwidth Product
Input Bias Current
Input Offset Current
Output Capacitance
Collector-to-Collector Capacitance
1
2
e
N
p-p
V
OS
f
T
I
B
I
OS
C
OB
C
CC
23
35
Current gain is guaranteed with collector-to-base voltage (V
CB
) swept from 0 V to V
MAX
at the indicated collector currents.
Current gain match (Δh
FE
) is defined as follows: Δh
FE
= (100(ΔI
B
)(h
FE min
)/I
C
).
3
Noise voltage density is guaranteed, but not 100% tested.
Rev. C | Page 4 of 12
Data Sheet
ABSOLUTE MAXIMUM RATING
Table 3.
Parameter
Breakdown Voltage of
Collector-to-Base Voltage (BV
CBO
)
Breakdown Voltage of
Collector-to-Emitter Voltage (BV
CEO
)
Breakdown Voltage of
Collector-to-Collector Voltage (BV
CC
)
Breakdown Voltage of
Emitter-to-Emitter Voltage (BV
EE
)
Collector Current (I
C
)
Emitter Current (I
E
)
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 sec)
Rating
40 V
40 V
40 V
40 V
20 mA
20 mA
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
300°C
SSM2212
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
8-Lead SOIC (R-8)
16-Lead LFCSP (CP-16-22)
θ
JA
120
75
θ
JC
45
4.4
Unit
°C/W
°C/W
ESD CAUTION
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. C | Page 5 of 12
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