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STM32F100D

Description
High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces
File Size1MB,98 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
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STM32F100D Overview

High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces

STM32F100xC STM32F100xD
STM32F100xE
High-density value line, advanced ARM-based 32-bit MCU with
256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces
Datasheet
production data
Features
Core: ARM 32-bit Cortex™-M3 CPU
– 24 MHz maximum frequency, 1.25 DMIPS
/MHz (Dhrystone 2.1) performance
– Single-cycle multiplication and hardware
division
Memories
– 256 to 512 Kbytes of Flash memory
– 24 to 32 Kbytes of SRAM
– Flexible static memory controller with 4
Chip Selects. Supports SRAM, PSRAM
and NOR memories
– LCD parallel interface, 8080/6800 modes
Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR and programmable voltage
detector (PVD)
– 4-to-24 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC
– PLL for CPU clock
– 32 kHz oscillator for RTC with calibration
Low power
– Sleep, Stop and Standby modes
– V
BAT
supply for RTC and backup registers
Serial wire debug (SWD) and JTAG I/F
DMA
– 12-channel DMA controller
– Peripherals supported: timers, ADC, SPIs,
I
2
Cs, USARTs and DACs
1 × 12-bit, 1.2 µs A/D converter (up to 16 ch.)
– Conversion range: 0 to 3.6 V
– Temperature sensor
2 × 12-bit D/A converters
Up to 112 fast I/O ports
– 51/80/112 I/Os, all mappable on 16
external interrupt vectors and almost all
5 V-tolerant
LQFP144
20 × 20 mm
LQFP100
14 × 14 mm
LQFP64
10 × 10 mm
Up to 16 timers
– Up to seven 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter
– One 16-bit, 6-channel advanced-control
timer: up to 6 channels for PWM output,
dead time generation and emergency stop
– One 16-bit timer, with 2 IC/OC, 1
OCN/PWM, dead-time generation and
emergency stop
– Two 16-bit timers, each with
IC/OC/OCN/PWM, dead-time generation
and emergency stop
– Two watchdog timers
– SysTick timer: 24-bit downcounter
– Two 16-bit basic timers to drive the DAC
Up to 11 communications interfaces
– Up to two I
2
C interfaces (SMBus/PMBus)
– Up to 3 USARTs (ISO 7816 interface, LIN,
IrDA capability, modem control)
– Up to 2 UARTs
– Up to 3 SPIs (12 Mbit/s)
– Consumer electronics control (CEC) I/F
CRC calculation unit, 96-bit unique ID
Device summary
Part number
Table 1.
Reference
STM32F100xC
STM32F100xD
STM32F100xE
STM32F100RC, STM32F100VC,
STM32F100ZC
STM32F100RD, STM32F100VD,
STM32F100ZD
STM32F100RE, STM32F100VE,
STM32F100ZE
September 2012
This is information on a product in full production.
Doc ID 15081 Rev 7
1/98
www.st.com
1

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Description High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces High-density value line, advanced ARM-based 32-bit MCU with 256 to 512 KB Flash, 16 timers, ADC, DAC & 11 comm interfaces
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