IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL
D REGISTERS (3-STATE)
IDT54/74FCT574/A/C
FEATURES:
•
•
•
•
•
•
•
•
•
•
IDT54FCT574A equivalent to FAST™ speed and drive
IDT54/74FCT574A up to 30% faster than FAST
IDT74FCT574C up to 50% faster than FAST
I
OL
= 48mA (commercial) and 32mA (military)
CMOS power levels (1mW typ. static)
Edge-triggered master/slave, D-type flip-flops
Buffered common clock and buffered common 3-state control
MIlitary product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
– Commercial: SOIC
– Military: CERDIP, LCC
DESCRIPTION:
The FCT574 is an 8-bit register built using an advanced dual metal CMOS
technology. These registers consist of eight D-type flip-flops with a buffered
common clock and buffered 3-state output control. When the output enable
(OE) is low, the eight outputs are enabled. When the
OE
input is high, the
outputs are in the high-impedance state.
Input data meeting the set-up and hold time requirements of the D inputs
is transferred to the O outputs on the low-to-high transition of the clock input.
The FCT574 has non-inverting outputs with respect to the data at the D
inputs.
FUNCTIONAL BLOCK DIAGRAM
D
0
CP
CP
D
Q
CP
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
CP
D
Q
OE
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-5428/2
© 2002 Integrated Device Technology, Inc.
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
V
CC
20
D
1
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
GND
2
3
4
5
6
7
8
9
10
19
18
17
16
15
14
13
12
11
O
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
D
7
GND
CP
O
7
3
2
1
19
18
17
16
15
14
9
10
11
12
13
D
0
O
0
OE
INDEX
OE
1
20
V
CC
D
2
D
3
D
4
D
5
D
6
4
5
6
7
8
O
1
O
2
O
3
O
4
O
5
CP
CERDIP/ SOIC
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
(2)
V
TERM
(3)
T
A
T
BIAS
T
STG
P
T
I
OUT
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
Temperature under BIAS
Storage Temperature
Power Dissipation
DC Output Current
0 to +70
–55 to +125
–55 to +125
0.5
120
–55 to +125
–65 to +135
–65 to +150
0.5
120
°C
°C
°C
W
mA
–0.5 to V
CC
–0.5 to V
CC
V
Commercial
–0.5 to +7
Military
–0.5 to +7
Unit
V
PIN DESCRIPTION
Pin Names
Dx
CP
Ox
OE
Description
D flip-flop data inputs
Clock Pulse for the register. Enters data on LOW-to-
HIGH transition.
3-State Outputs (TRUE)
Active LOW 3-State Output Enable Input
FUNCTION TABLE
(1)
Function
High-Z
Load
Register
OE
H
H
L
L
H
H
Inputs
CP
L
H
↑
↑
↑
↑
Dx
X
X
L
H
L
H
Outputs
Ox
Z
Z
L
H
Z
Z
Internal
Ox
NC
NC
H
L
H
L
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
NOTE:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
Z = High Impedance
NC = No Change
↑
= LOW-to-HIGH transition
NOTE:
1. This parameter is measured at characterization but not tested.
2
O
6
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ±5%, Military: T
A
= -55°C to +125°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OS
V
OH
Off State (High Impedance)
Output Current
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Max.
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
V
CC
= Max.
Input LOW Current
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC
(4)
0.5
0.5
µA
µA
Unit
V
V
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= GND
(3)
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µA
V
CC
= Min
I
OH
= –300µA
V
IN
= V
IH
or V
IL
I
OH
= –12mA MIL
I
OH
= –15mA COM'L
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µA
V
CC
= Min
I
OL
= 300µA
V
IN
= V
IH
or V
IL
I
OL
= 32mA MIL
I
OL
= 48mA COM'L
V
mA
V
V
OL
Output LOW Voltage
V
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not ttested.
3
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply
Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC
; V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
= GND
One Input Toggling
50% Duty Cycle
I
C
Total Power Supply Current
(6)
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
fi = 5MHz
One Bit Toggling
V
CC
= Max.
Outputs Open
f
CP
= 10MHz
50% Duty Cycle
OE
= GND
fi = 2.5MHz
Eight Bits Toggling
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of
∆I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + fiNi)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for register devices (zero for non-register devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
Min.
—
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2
0.25
Unit
mA
mA
mA/
MHz
V
IN
≥
V
HC
V
IN
≤
V
LC
—
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4
mA
—
2.2
6
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
4
7.8
(5)
—
6.2
16.8
(5)
4
IDT54/74FCT574/A/C
FAST CMOS OCTAL D REGISTERS (3-STATE)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
t
H
t
W
Parameter
Propagation Delay
CP to Qx
Output Enable Time
Output Disable Time
Set-up Time HIGH or LOW
Dx to CP
Hold Time HIGH or LOW
Dx to CP
CP Pulse Width HIGH or LOW
(3)
Condition
(1)
C
L
= 50pF
R
L
= 500Ω
54FCT574
Mil.
Min.
(2)
Max.
2
11
1.5
1.5
2
1.5
7
14
8
—
—
—
54/74FCT574A
Com'l.
Mil.
Min.
(2)
Max.
Min.
(2)
Max.
2
6.5
2
7.2
1.5
1.5
2
1.5
5
6.5
5.5
—
—
—
1.5
1.5
2
1.5
6
7.5
6.5
—
—
—
74FCT574C
Com'l.
Min.
(2)
Max.
2
5.2
1.5
1.5
2
1.5
5
5.5
5
—
—
—
Unit
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
5
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