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5962-9207808HXC

Description
SRAM Module, 512KX8, 25ns, CMOS, DIP-32
Categorystorage    storage   
File Size159KB,20 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

5962-9207808HXC Overview

SRAM Module, 512KX8, 25ns, CMOS, DIP-32

5962-9207808HXC Parametric

Parameter NameAttribute value
Objectid2078429697
package instructionDIP-32
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time25 ns
I/O typeCOMMON
JESD-30 codeR-XDIP-T32
JESD-609 codee4
length40.64 mm
memory density4194304 bit
Memory IC TypeSRAM MODULE
memory width8
Number of functions1
Number of terminals32
word count524288 words
character code512000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize512KX8
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIP
Encapsulate equivalent codeDIP32,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
power supply5 V
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height5.08 mm
Maximum standby current0.0128 A
Minimum standby current2 V
Maximum slew rate0.21 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
width15.24 mm
REVISIONS
LTR
A
B
C
D
E
F
DESCRIPTION
Changes in accordance with NOR 5962-R109-94.
Add case outline Y.
Added device type 09. Made changes to table I.
Changes in accordance with NOR 5962-R153-97.
Add case outline T.
Table I; Changed the max limit for I
CC
for device types 06 trough 09
from 200 mA to 210 mA. Changes the max limit for I
CCDR
for device
types 06 through 09 from 10.4 mA to 12.8 mA. -sld
Added note to paragraph 1.2.2 and table I to regarding the 4
transistor design. Added thermal resistance ratings for all case
outlines to paragraph 1.3. Editorial changes throughout. -sld
Table I, t
OH
, change minimum limit for device types 01 through 03
from 15 ns to 5 ns.
DATE (YR-MO-DA)
94-01-25
94-09-02
95-07-19
96-12-16
97-02-24
98-06-23
APPROVED
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
K. A. Cottongim
G
00-07-03
Raymond Monnin
H
01-04-09
Raymond Monnin
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
H
15
H
16
H
17
H
18
REV
SHEET
PREPARED BY
Steve L. Duncan
CHECKED BY
Michael C. Jones
H
1
H
2
H
3
H
4
H
5
H
6
H
7
H
8
H
9
H
10
H
11
H
12
H
13
H
14
STANDARD
MICROCIRCUIT
DRAWING
DEFENSE SUPPLY CENTER COLUMBUS
POST OFFICE BOX 3990
COLUMBUS, OHIO 43216-5000
http://www.dscc.dla.mil
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, HYBRID, MEMORY,
DIGITAL, STATIC RANDOM ACCESS
MEMORY, CMOS, 512K x 8-BIT
DRAWING APPROVAL DATE
93-01-25
REVISION LEVEL
H
SIZE
A
SHEET
CAGE CODE
67268
1 OF
18
5962-92078
5962-E329-01
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
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