TN12, TS12 and TYNx12 Series
Sensitive and Standard
12 A SCRS
Main features
Symbol
I
T(RMS)
V
DRM
/V
RRM
I
GT
Value
12
600 to 1000
0.2 to 15
Unit
A
A
G
K
A
A
V
mA
K A
G
K A
G
DPAK
(TN12-B / TS12-B)
PAK
(TN12-G)
A
D
2
Description
Available either in sensitive (TS12) or standard
(TN12 / TYN) gate triggering levels, the 12 A SCR
series is suitable to fit all modes of control, found
in applications such as overvoltage crowbar
protection, motor control circuits in power tools
and kitchen aids, inrush current limiting circuits,
capacitive discharge ignition and voltage
regulation circuits.
Available in through-hole or surface-mount
packages, they provide an optimized performance
in a limited space area.
A
K
A
K
G
A
G
IPAK
(TN12-H / TS12-H)
TO-220AB
(TYNx12RG)
Order codes
Part Numbers
TN1215-x00B
TN1215-x00B-TR
TN1215-x00G
TN1215-x00G-TR
TN1215-x00H
TS1220-x00B
TS1220-x00B-TR
TS1220-x00H
TYNx12RG
TYNx12TRG
Marking
TN1215x00
TN1215x00
TN1215x00G
TN1215x00G
TN1215x00
TS1220x00
TS1220x00
TS1220x00
TYNx12
TYNx12T
March 2007
Rev 6
1/12
www.st.com
12
Characteristics
TN12, TS12 and TYNx12 Series
1
Table 1.
Symbol
Characteristics
Absolute ratings (limiting values)
Value
Parameter
TN12-G
TYN12
T
c
= 105° C
T
c
= 105° C
145
T
j
= 25° C
T
j
= 25° C
T
j
= 125° C
T
j
= 125° C
T
j
= 125° C
140
98
50
4
1
- 40 to + 150
- 40 to + 125
5
12
8
115
A
110
60
A
2
S
A/µs
A
W
°C
V
TN12-B/H
TS12-B/H
Unit
I
T(RMS)
I
T(AV)
I
TSM
I
²
t
dI/dt
I
GM
P
G(AV)
T
stg
T
j
V
RGM
RMS on-state current (180° conduction angle)
Average on-state current (180° conduction angle)
Non repetitive surge peak on-state
current
I
²
t Value for fusing
Critical rate of rise of on-state
current I
G
= 2 x I
GT
, t
r
≤
100 ns
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
t
p
= 8.3 ms
t
p
= 10 ms
t
p
= 10 ms
F = 60 Hz
t
p
= 20 µs
A
A
Maximum peak reverse gate voltage (for
TN12
and
TYN12
only)
Table 2.
Symbol
I
GT
V
GT
V
GD
V
RG
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
Sentitive electrical characteristics (T
j
= 25° C, unless otherwise specified)
Test Conditions
V
D
= 12 V
V
D
= V
DRM
I
RG
= 10 µA
I
T
= 50 mA
I
G
= 1 mA
R
GK
= 1 kΩ
R
GK
= 1 kΩ
R
GK
= 220
Ω
T
j
= 125° C
T
j
= 25° C
T
j
= 125° C
T
j
= 125° C
T
j
= 25° C
T
j
= 125° C
R
L
= 140
Ω
R
L
= 3.3 kΩ
R
GK
= 220
Ω
T
j
= 125° C
MAX.
MAX.
MIN.
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
MAX.
2
mA
TS1220
200
0.8
0.1
8
5
6
5
1.6
0.85
30
5
Unit
µA
V
V
V
mA
mA
V/µs
V
V
mΩ
µA
V
D
= 65 % V
DRM
I
TM
= 24 A
t
p
= 380 µs
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
R
GK
= 220
Ω
2/12
TN12, TS12 and TYNx12 Series
Table 3.
Symbol
Characteristics
Standard electrical characteristics (T
j
= 25° C, unless otherwise specified)
TN1215
Test Conditions
B/H
MIN.
2
15
1.3
0.2
40
80
200
1.6
0.85
30
5
MAX.
2
mA
30
60
15
30
40
30
60
200
G
x12T
0.5
5
x12
2
mA
MAX.
MAX.
V
D
= V
DRM
I
T
= 500 mA
I
G
= 1.2 I
GT
V
D
= 67 % V
DRM
I
TM
= 24 A
Gate open
T
j
=125° C
T
j
= 25° C
T
j
= 125° C
T
j
= 125° C
T
j
= 25° C
T
j
= 125° C
R
L
= 3.3 kΩ
Gate open
T
j
= 125° C
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
15
V
V
mA
mA
V/µs
V
V
mΩ
µA
TYN
Unit
I
GT
V
GT
V
GD
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
V
D
= 12 V
R
L
= 33
Ω
t
p
= 380 µs
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
Table 4.
Symbol
R
th(j-c)
Thermal resistance
Parameter
Junction to case (DC)
S
(1)
= 0.5 cm
²
S
(1)
= 1 cm
²
DPAK
D
2
PAK
IPAK
TO-220AB
Value
1.3
70
45
° C/W
100
60
Unit
° C/W
R
th(j-a)
Junction to ambient (DC)
1. S = Copper surface under tab
Figure 1.
Maximum average power
Figure 2.
dissipation versus average on-state
current
I
T(AV)
(A)
14
Average and D.C. on-state current
versus case temperature
P(W)
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
360°
α
= 180°
D.C.
12
10
α
= 180°
8
6
4
2
I
T(AV)
(A)
α
8
9
T
case
(°C)
0
0
25
50
75
100
125
3/12
Characteristics
TN12, TS12 and TYNx12 Series
Figure 3.
Average and D.C. on-state current
versus ambient temperature
(device mounted on FR4 with
recommended pad layout) (DPAK)
Figure 4.
Relative variation of thermal
impedance junction to case versus
pulse duration
I
T(AV)
(A)
3.0
2.5
D.C.
K=[Z
th(j-c)
/R
th(j-c)
]
1.0
2.0
1.5
α
= 180°
D
2
PAK
0.5
1.0
0.5
DPAK
0.2
T
amb
(°C)
0.0
0
25
50
75
100
125
t
p
(s)
0.1
1E-3
1E-2
1E-1
1E+0
Figure 5.
Figure 6.
Relative variation of thermal
impedance junction to ambient
versus pulse duration
(recommended pad layout, FR4 PC
board for DPAK)
2.0
1.8
1.6
DPAK
Relative variation of gate trigger
current and holding current versus
junction temperature for TS12
series
K=[Z
th(j-a)
/R
th(j-a)
]
1.00
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
I
GT
1.4
D
2
PAK
1.2
TO-220AB / IPAK
0.10
1.0
0.8
0.6
0.4
I
H
& I
L
R
GK
= 1k
Ω
t
p
(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
0.2
0.0
-40
-20
0
20
T
j
(°C)
40
60
80
100
120
140
Figure 7.
Figure 8.
Relative variation of gate trigger
current and holding current versus
junction temperature for TN12 and
TYNx12 series
5.0
4.5
4.0
I
GT
Relative variation of holding
current versus gate-cathode
resistance (typical values) for TS12
series
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-40
-20
0
20
40
60
80
100
120
140
I
H
& I
L
I
H
[R
GK
] / I
H
[R
GK
=1k
Ω
]
T
j
= 25°C
3.5
3.0
2.5
2.0
1.5
1.0
T
j
(°C)
0.5
0.0
1E-2
1E-1
R
GK
(k
Ω
)
1E+0
1E+1
4/12
TN12, TS12 and TYNx12 Series
Characteristics
Figure 9.
Relative variation of dV/dt immunity Figure 10. Relative variation of dV/dt immunity
versus gate-cathode resistance
versus gate-cathode capacitance
(typical values) for TS12 series
(typical values) for TS12 series
dV/dt[C
GK
] / dV/dt[R
GK
=220
Ω
]
4.0
T
j
= 125°C
V
D
= 0.67 x V
DRM
dV/dt[R
GK
] / dV/dt[R
GK
=220
Ω
]
10.0
3.5
3.0
2.5
V
D
= 0.67 x V
DRM
T
j
= 125°C
R
GK
= 220
Ω
1.0
2.0
1.5
1.0
R
GK
(k
Ω
)
0.1
0
200
400
600
800
1000
1200
0.5
0.0
0
25
50
C
GK
(nF)
75
100
125
150
Figure 11. Surge peak on-state current versus Figure 12. Non-repetitive surge peak on-state
number of cycles
current for a sinusoidal pulse with
width tp < 10 ms, and
corresponding values of I²t
I
TSM
(A)
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
1
2000
T
j
initial = 25°C
I
TSM
(A), I
2
t (A
2
s)
1000
TN12 / TYN12
Non repetitive
T
j
initial=25°C
t
p
=10ms
One cycle
dI/dt limitation
TS12
TN12 / TYN12
I
TSM
TS12
100
I
2
t
TN12 / TYN12
TS12
Repetitive
T
C
=105°C
Number of cycles
10
t
p
(ms)
0.01
0.10
1.00
10.00
10
100
1000
Figure 13. On-state characteristics (maximum Figure 14. Thermal resistance junction to
values)
ambient versus copper surface
under tab (epoxy printed circuit
board FR4, copper thickness:
35 µm) (DPAK and D
2
PAK)
I
TM
(A)
200
100
T
j
max.:
V
t0
=0.85V
R
d
=30m
Ω
R
th(j-a)
(°C/W)
100
80
60
T
j
=max
DPAK
10
T
j
=25°C
40
D
2
PAK
20
V
TM
(V)
1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
0
2
4
6
8
S(cm²)
10
12
14
16
18
20
5/12
Embedded System
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