SMDA05CN-5 THRU SMDA15CN-5
Bidirectional TVS Array
for Protection of Five Lines
PROTECTION PRODUCTS
Description
The SMDAxxCN-5 series of transient voltage suppres-
sors are designed to protect components which are
connected to data and transmission lines from voltage
surges caused by ESD (electrostatic discharge), EFT
(electrical fast transients), and lightning.
TVS diodes are characterized by their high surge
capability, low operating and clamping voltages, and
fast response time. This makes them ideal for use as
board level protection of sensitive semiconductor
components. The SMDAxxCN-5 is designed to provide
transient suppression on multiple data lines and I/O
ports. The low profile SO-8 design allows the user to
protect up to five data and I/O lines with one package.
The SMDAxxCN-5 TVS diode array will meet the surge
requirements of IEC 61000-4-2 (Formerly IEC 801-2),
Level 4, Human Body Model for air and contact
discharge.
Features
u
300 watts peak pulse power (tp = 8/20µs)
u
Transient protection for data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 12A (8/20µs)
Protects up to 5 bidirectional lines
Low operating voltage
Low clamping voltage
Solid-state silicon avalanche technology
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Mechanical Characteristics
JEDEC SO-8 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tube or Tape and Reel per EIA 481
Applications
RS-232 Data Lines
RS-423 Data Lines
LAN/WAN Equipment
Servers
Notebook & Desktop PC
Set Top Box
Peripherals
Circuit Diagram
Schematic & PIN Configuration
SO-8 (Top View)
Revision 9/2000
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SMDA05CN-5 THRU SMDA15CN-5
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Peak Pulse Pow er (tp = 8/20µ s)
Peak Pulse Current (tp = 8/20µ s)
Lead Sold ering Temp erature
Op erating Temp erature
Storage Temp erature
Symbo l
P
p k
I
PP
T
L
T
J
T
STG
Value
300
20
260 (10 sec.)
-55 to +125
-55 to +150
Units
Watts
A
°C
°C
°C
Electrical Characteristics
SMDA05CN-5
Par ame te r
Reverse Stand -Off Voltage
Reverse Breakd ow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Clamp ing Voltage
Maximum Peak Pulse Current
Junction Cap acitance
Symbo l
V
RWM
V
BR
I
R
V
C
V
C
I
PP
C
j
I
t
= 1mA
V
RWM
= 5V, T=25°C
I
PP
= 1A , tp = 8/20µ s
I
PP
= 10A , tp = 8/20µ s
tp = 8/20µ s
Betw een I/O Pins and
Gnd
V
R
= 0V, f = 1MHz
6
10
9.8
11
20
350
Co nd itio ns
Minimum
Typ ical
Maximum
5
Units
V
V
µA
V
V
A
pF
SMDA15CN-5
Par ame te r
Reverse Stand -Off Voltage
Reverse Breakd ow n Voltage
Reverse Leakage Current
Clamp ing Voltage
Clamp ing Voltage
Maximum Peak Pulse Current
Junction Cap acitance
Symbo l
V
RWM
V
BR
I
R
V
C
V
C
I
PP
C
j
I
t
= 1mA
V
RWM
= 15V, T=25°C
I
PP
= 1A , tp = 8/20µ s
I
PP
= 10A , tp = 8/20µ s
tp = 8/20µ s
Betw een I/O Pins and
Gnd
V
R
= 0V, f = 1MHz
16.7
1
24
30
10
75
Co nd itio ns
Minimum
Typ ical
Maximum
15
Units
V
V
µA
V
V
A
pF
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SMDA05CN-5 THRU SMDA15CN-5
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
110
100
Peak Pulse Power - P
PP
(kW)
90
% of Rated Power or I
PP
80
70
60
50
40
30
20
10
0.01
0.1
1
10
Pulse Duration - tp (µs)
100
1000
0
0
25
50
75
100
125
o
Power Derating Curve
1
0.1
150
175
Ambient Temperature - T
A
( C)
Pulse Waveform
110
100
90
80
Percent of I
PP
70
60
50
40
30
20
10
0
0
5
10
15
Time (µs)
20
25
30
0
td = I
PP
/2
e
-t
Clamping Voltage vs. Peak Pulse Current
35
Waveform
Parameters:
tr = 8µs
td = 20µs
30
Clamping Voltage - V
C
(V)
25
20
15
10
5
SMDA05CN-5
SMDA15CN-5
Waveform
Parameters:
tr = 8µs
td = 20µs
0
2
4
6
8
10
12
14
16
18
20
22
24
Peak Pulse Current - I
PP
(A)
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SMDA05CN-5 THRU SMDA15CN-5
PROTECTION PRODUCTS
Applications Information
Device Connection Options for Protection of Four or
Five Data Lines
The SMDAxxCN-5 can be configured to protect either
four or five bidirectional data lines. The options for
connecting the devices are as follows:
1. Bidirectional protection of four I/O lines is achieved
by connecting pins 1, 2, 3, and 4 to the data lines.
Pins 5, 6, 7, and 8 are connected to ground. The
ground connection should be made directly to the
ground plane for best results. The path length is
kept as short as possible to reduce the effects of
parasitic inductance in the board traces. In this
configuration, the device can withstand the maxi-
mum specified transient impulse on four lines
simultaneously.
2. Bidirectional protection of five I/O lines is achieved
by connecting pins 1, 2, 3, 4, and 5 to the data
lines. Pins 6, 7, and 8 are connected to ground.
The ground connection should be made directly to
the circuit board ground plane for best results. In
this configuration, the device can withstand the
maximum rated transient impulse on any two lines
simultaneously.
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
l
l
l
l
l
l
Protection for Four Bidirectional Lines
From Connector
To Protected IC
Protection for Five Bidirectional Lines
From Connector
Place the TVS near the input terminals or connec-
tors to restrict transient coupling.
Minimize the path length between the TVS and the
protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
To Protected IC
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SMDA05CN-5 THRU SMDA15CN-5
PROTECTION PRODUCTS
Outline Drawing - SO-8
Land Pattern - SO-8
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