MMDF1300
Power MOSFET
3 Amps, 25 Volts
Complementary SO–8, Dual
These miniature surface mount MOSFETs feature ultra low RDS(on)
and true logic level performance. They are capable of withstanding
high energy in the avalanche and commutation modes and the
drain–to–source diode has a very low reverse recovery time.
MiniMOSt devices are designed for use in low voltage, high speed
switching applications where power efficiency is important. Typical
applications are dc–dc converters, and power management in portable
and battery powered products such as computers, printers, cellular and
cordless phones. They can also be used for low voltage motor controls
in mass storage products such as disk drives and tape drives. The
avalanche energy is specified to eliminate the guesswork in designs
where inductive loads are switched and offer additional safety margin
against unexpected voltage transients.
•
Low RDS(on) Provides Higher Efficiency and Extends Battery Life
•
Logic Level Gate Drive – Can be Driven by Logic ICs
•
Miniature SO–8 Surface Mount Package – Saves Board Space
•
Diode Exhibits High Speed, with Soft Recovery
MAXIMUM RATINGS
(TJ = 25°C unless otherwise noted)
Rating
Drain–to–Source Voltage
Gate–to–Source Voltage
Drain Current – Continuous
N–Channel
P–Channel
Drain Current – Pulsed
N–Channel
P–Channel
Operating and Storage Temperature Range
Total Power Dissipation @ TA = 25°C
Single Pulse Drain–to–Source Avalanche
Energy – Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 10 Vdc,
IL = 3.0 Apk, L = 25 mH, RG = 25
W)
Thermal Resistance – Junction–to–Ambient
(Note 1.)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 sec.
Symbol
VDSS
VGS
ID
3.0
2.0
IDM
9.0
6.0
TJ, Tstg
PD
EAS
–65 to
+150
1.8
°C
Watts
mJ
Apk
Value
25
±
20
Unit
Vdc
Vdc
Adc
8
1
1300
L
Y
WW
= Device Code
= Location Code
= Year
= Work Week
SO–8, Dual
CASE 751
STYLE 11
1300
LYWW
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3 AMPERES
25 VOLTS
RDS(on) = 100 mW (N–Channel)
RDS(on) = 210 mW (P–Channel)
N–Channel
D
P–Channel
D
G
S
G
S
MARKING
DIAGRAM
PIN ASSIGNMENT
113
Source–1
1
2
3
4
8
7
6
5
Drain–1
Drain–1
Drain–2
Drain–2
R
θJA
TL
66.3
260
°C/W
°C
Gate–1
Source–2
Gate–2
1. Mounted on 2″ square FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided),
10 sec. max.
Device
MMDF1300R2
Top View
ORDERING INFORMATION
Package
SO–8
Shipping
2500 Tape & Reel
©
Semiconductor Components Industries, LLC, 2001
1
March, 2001 – Rev. 1
Publication Order Number:
MMDF1300/D
MMDF1300
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250
µAdc)
Zero Gate Voltage Drain Current
(VDS = 25 Vdc, VGS = 0 Vdc)
Gate–Body Leakage Current (VGS = 20 Vdc, VDS = 0)
ON CHARACTERISTICS
(Notes 2. & 3.)
Gate Threshold Voltage
(VDS = VGS, ID = 250
µAdc)
Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 2.0 Adc)
Drain–to–Source On–Resistance
(VGS = 4.5 Vdc, ID = 1.0 Adc)
Forward Transconductance
(VDS = 3.0 Vdc, ID = 1.5 Adc)
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
(Note 4.)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Total Gate Charge
td(on)
(VDD = 10 Vdc,
ID = 2.0 Adc,
VGS = 4.5 Vdc,
RG = 6.0
Ω)
tr
td(off)
tf
QT
Q1
Q2
Q3
2. Pulse Test: Pulse Width
≤
300
µs,
Duty Cycle
≤
2%.
3. Negative signs for P–Channel device omitted for clarity.
4. Switching characteristics are independent of operating junction temperature.
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
18
14
98
95
16
22
30
40
3.3
7.0
1.2
1.2
2.0
2.5
1.9
3.5
36
28
196
180
32
45
60
80
5.0
10
–
–
–
–
–
–
nC
ns
(VDS = 16 Vdc,
Vd
VGS = 0 Vdc,
f = 1.0 MHz)
Ciss
Coss
Crss
(N)
(P)
(N)
(P)
(N)
(P)
–
–
–
–
–
–
215
200
111
100
30
40
301
300
158
160
60
75
pF
VGS(th)
RDS(on)
RDS(on)
(N)
(P)
gFS
(N)
(P)
–
–
1.0
1.0
0.13
0.30
–
–
0.16
0.375
–
–
mhos
(N)
(P)
(N)
(P)
1.0
1.0
–
–
1.5
2.0
0.09
0.16
2.0
3.0
0.10
0.21
Vdc
Ohms
Ohms
V(BR)DSS
–
IDSS
IGSS
(N)
(P)
–
30
–
–
–
–
–
–
–
–
1.0
1.0
±100
µAdc
nAdc
Vdc
Symbol
Polarity
Min
Typ
Max
Unit
(VDS = 16 Vdc,
ID = 2.0 Adc,
2 0 Adc
VGS = 4.5 Vdc)
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2
MMDF1300
PACKAGE DIMENSIONS
SO–8
CASE 751–07
ISSUE V
–X–
A
8
5
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
_
8
_
0.25
0.50
5.80
6.20
SOURCE 1
GATE 1
SOURCE 2
GATE 2
DRAIN 2
DRAIN 2
DRAIN 1
DRAIN 1
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
_
8
_
0.010
0.020
0.228
0.244
B
1
4
S
0.25 (0.010)
M
Y
M
–Y–
G
C
–Z–
H
D
0.25 (0.010)
M
SEATING
PLANE
K
N
X 45
_
0.10 (0.004)
M
J
Z Y
S
X
S
STYLE 11:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
MiniMOS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor
and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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4
MMDF1300/D