WS256K32-XXX
HI-RELIABILITY PRODUCT
256Kx32 SRAM MODULE
FEATURES
s
Access Times 20, 25, 35ns
s
MIL-STD-883 Compliant Devices Available
s
Packaging
PRELIMINARY*
s
2V Data Retention devices available
(WS256K32L-XXX low power version only)
s
Commercial, Industrial and Military Temperature Range
s
5 Volt Power Supply
s
Low Power CMOS
s
TTL Compatible Inputs and Outputs
s
Weight
WS256K32N-XHX - 13 grams typical
WS256K32-XG4X - 20 grams typical
* This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
• 66 pin, PGA Type, 1.185 inch square, Hermetic
Ceramic HIP (Package 401)
• 68 lead, 40mm, Hermetic CQFP (Package 501)
s
Organized as 256Kx32, User Configurable as 512Kx16
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Upgradable to 512Kx32 for future expansion
s
Data I/O Compatible with 3.3V devices
FIG. 1
1
I/O
8
I/O
9
PIN CONFIGURATION FOR WS256K32N-XHX
TOP VIEW
12
NC
NC
GND
I/O
11
A
10
A
11
A
12
V
CC
CS
1
NC
I/O
3
22
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
44
34
V
CC
NC
NC
I/O
27
A
3
A
4
A
5
WE
2
CS
2
GND
I/O
19
55
45
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
66
16
16
PIN DESCRIPTION
56
I/O
0
-
31
A
0-17
WE
1-2
CS
1-2
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
I/O
10
A
13
A
14
A
15
A
16
A
17
I/O
0
I/O
1
I/O
2
11
OE
BLOCK DIAGRAM
WE
1
CS
1
OE
A
0-17
WE
2
CS
2
V
CC
GND
NC
256K x 16
256K x 16
I/O
0-15
I/O
16-31
October 2000 Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS256K32-XXX
FIG. 2
PIN CONFIGURATION FOR WS256K32-XG4X
TOP VIEW
NC
A
0
A
1
A
2
A
3
A
4
A
5
CS
1
GND
CS
2
WE
A
6
A
7
A
8
A
9
A
10
V
CC
PIN DESCRIPTION
I/O
0
-
31
A
0-17
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
I/O
0
I/O
1
I/O
2
I/O
3
I/O
4
I/O
5
I/O
6
I/O
7
GND
I/O
8
I/O
9
I/O
10
I/O
11
I/O
12
I/O
13
I/O
14
I/O
15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O
16
I/O
17
I/O
18
I/O
19
I/O
20
I/O
21
I/O
22
I/O
23
GND
I/O
24
I/O
25
I/O
26
I/O
27
I/O
28
I/O
29
I/O
30
I/O
31
WE
CS
1-2
OE
BLOCK DIAGRAM
CS
1
WE
OE
A
0
-
17
CS
2
V
CC
GND
NC
256K x 16
256K x 16
16
16
V
CC
A
11
A
12
A
13
A
14
A
15
A
16
NC
OE
NC
A
17
NC
NC
NC
NC
NC
NC
I/O
0-15
I/O
16-31
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
2
WS256K32-XXX
ABSOLUTE MAXIMUM RATINGS
Parameter
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
Symbol
T
A
T
STG
V
G
T
J
V
CC
-0.5
Min
-55
-65
-0.5
Max
+125
+150
Vcc+0.5
150
7.0
Unit
°C
°C
V
°C
V
CS
H
L
L
L
OE
X
L
H
X
WE
X
H
H
L
TRUTH TABLE
Mode
Standby
Read
Out Disable
Write
Data I/O
High Z
Data Out
High Z
Data In
Power
Standby
Active
Active
Active
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply Voltage
Input High Voltage
Input Low Voltage
Operating Temp (Mil)
Symbol
V
CC
V
IH
V
IL
T
A
Min
4.5
2.2
-0.5
-55
Max
5.5
V
CC
+ 0.3
+0.8
+125
Unit
V
V
V
°C
Parameter
OE capacitance
WE
1-2
capacitance
HIP (PGA)
CQFP G4
CS
1-2
capacitance
Data I/O capacitance
Address input capacitance
CAPACITANCE
(T
A
= +25°C)
Symbol
C
OE
C
WE
Conditions
V
IN
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
20
28
20
20
28
Max
28
Unit
pF
pF
C
CS
C
I/O
C
AD
V
IN
= 0 V, f = 1.0 MHz
V
I/O
= 0 V, f = 1.0 MHz
V
IN
= 0 V, f = 1.0 MHz
pF
pF
pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Input Leakage Current
Output Leakage Current
Operating Supply Current x 32 Mode
Standby Current
Output Low Voltage
Output High Voltage
Symbol
I
LI
I
LO
I
CC x 32
I
SB
V
OL
V
OH
Conditions
Min
V
CC
= 5.5, V
IN
= GND to V
CC
CS = V
IH
, OE = V
IH
, V
OUT
= GND to V
CC
CS = V
IL
, OE = V
IH
, f = 5MHz, Vcc = 5.5
CS = V
IH
, OE = V
IH
, f = 5MHz, Vcc = 5.5
I
OL
= 8mA, Vcc = 4.5
I
OH
= -4.0mA, Vcc = 4.5
2.4
Max
10
10
550
34
0.4
Units
µA
µA
mA
mA
V
V
NOTE: DC test conditions: V
IH
= V
CC
-0.3V, V
IL
= 0.3V
LOW POWER DATA RETENTION CHARACTERISTICS
(WS256K32L-XXX ONLY)
(T
A
= -55°C to +125°C)
Parameter
Data Retention Supply Voltage
Data Retention Current
Symbol
V
DR
I
CCDR3
Conditions
Min
CS
≥
V
CC
-0.2V
V
CC
= 3V
2.0
1.0
Typ
Max
5.5
16
V
mA
Units
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WS256K32-XXX
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Read Cycle
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
t
RC
t
AA
t
OH
t
ACS
t
OE
t
CLZ
1
Symbol
Min
20
-20
Max
Min
25
20
0
20
12
5
0
12
12
5
0
0
-25
Max
Min
35
25
0
25
15
5
0
15
15
-35
Max
Units
ns
35
ns
ns
35
20
ns
ns
ns
ns
20
20
ns
ns
t
OLZ
1
t
CHZ
1
t
OHZ
1
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, T
A
= -55°C to +125°C)
Parameter
Write Cycle
Write Cycle Time
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
AH
t
OW
1
t
WHZ
1
t
DH
0
Symbol
Min
20
17
17
12
17
0
2
0
8
0
-20
Max
Min
25
20
20
15
20
0
2
0
10
0
-25
Max
Min
35
25
25
20
25
0
2
0
15
-35
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
1. This parameter is guaranteed by design but not tested.
FIG. 3
AC TEST CIRCUIT
Current Source
I
OL
AC TEST CONDITIONS
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
D.U.T.
V
Z
Typ
V
IL
= 0, V
IH
= 3.0
5
1.5
1.5
Unit
V
ns
V
V
≈
1.5V
Output Timing Reference Level
C
eff
= 50 pf
(Bipolar Supply)
I
OH
Current Source
NOTES:
V
Z
is programmable from -2V to +7V.
I
OL
& I
OH
programmable from 0 to 16mA.
Tester Impedance Z
0
= 75
Ω.
V
Z
is typically the midpoint of V
OH
and V
OL
.
I
OL
& I
OH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
4
WS256K32-XXX
FIG. 4
TIMING WAVEFORM - READ CYCLE
ADDRESS
t
RC
t
AA
CS
t
RC
ADDRESS
t
ACS
t
CLZ
OE
t
CHZ
t
AA
t
OH
DATA I/O
PREVIOUS DATA VALID
DATA VALID
t
OE
t
OLZ
DATA I/O
HIGH IMPEDANCE
t
OHZ
DATA VALID
READ CYCLE 1 (CS = OE = V
IL
, WE = V
IH
)
READ CYCLE 2 (WE = V
IH
)
FIG. 5
WRITE CYCLE - WE CONTROLLED
t
WC
ADDRESS
t
AW
t
CW
CS
t
AH
t
AS
WE
t
WP
t
OW
t
WHZ
t
DW
t
DH
DATA I/O
DATA VALID
WRITE CYCLE 1, WE CONTROLLED
FIG. 6
WRITE CYCLE - CS CONTROLLED
ADDRESS
t
WC
WS32K32-XHX
t
AS
t
AW
t
CW
t
AH
CS
t
WP
WE
t
DW
DATA I/O
DATA VALID
t
DH
WRITE CYCLE 2, CS CONTROLLED
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
Embedded System
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