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PT5806

Description
18-A 5-V Input Adjustable Integrated Switching Regulator
File Size203KB,11 Pages
ManufacturerETC
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PT5806 Overview

18-A 5-V Input Adjustable Integrated Switching Regulator

PT5800 Series
18-A 5-V Input Adjustable
Integrated Switching Regulator
SLTS171A JANUARY 2003 - REVISED - MARCH 2003
Features
5V Input
18A Output Current
DSP Compatible
Low-Profile (8mm)
>90% Efficiency
Output Margin Control (±5%)
Adjustable Output Voltage
On/Off Inhibit Function
Pre-Bias Startup Capability
Over-Current Protection
Over-Temperature Protection
Small Footprint
(0.736 in², Suffix ‘N’)
Surface Mount Compatible
IPC Lead Free 2
Description
The PT5800 Excalibur™ series of integrated
switching regulators (ISRs) combines outstand-
ing power density with a comprehensive list of
features. They are an ideal choice for applications
where board space is a premium and performance
cannot be compromised. These modules provide
18A of output current, yet are housed in a low-
profile, 18-pin package that is almost half the
size of the previous product generation. The
integral copper case construction requires no
heatsink, and offers the advantages of solderabil-
ity and a small footprint (0.736 in² for suffix ‘N’).
Both through-hole and surface mount pin con-
figurations are available.
The PT5800 series operates from a 5-V input
bus and provides a convenient point-of-load power
source for the industry’s latest high-performance
DSPs and microprocessors. The series includes
output voltage options as low as 1.0VDC.
Other features include external output voltage
adjustment, a ±5% margin control, on/off inhibit,
short circuit protection, thermal shutdown, and a
differential remote sense.
Ordering Information
PT5801H
PT5802H
PT5803H
PT5804H
PT5805H
PT5806H
= 3.3 Volts
= 2.5 Volts
= 1.8 Volts
= 1.5 Volts
= 1.2 Volts
= 1.0 Volts
Pin-Out Information
Pin Function
1
2
3
4
5
6
7
V
o
Adjust
Inhibit*
Margin Dn*
Margin Up*
V
in
V
in
V
in
Sense(–)
GND
GND
GND
GND
GND
V
out
V
out
V
out
V
out
Sense(+)
PT Series Suffix
(PT1234
x
)
Case/Pin
Configuration
Vertical
Horizontal
SMD
Order
Suffix
Package
Code
(EPP)
(EPQ)
(EPS)
8
9
10
11
12
13
14
15
16
17
18
N
A
C
(Reference the applicable package code draw-
ing for the dimensions and PC board layout)
* Denotes negative logic:
Open = Normal operation
Ground = Function active
Standard Application
Margin Dn
Margin Up
V
o
Adjust
1
5, 6, 7
4
3
18
14–17
Sense(+)
V
OUT
V
IN
C
IN
820µF
(Required)
Inhibit
GND
PT5800
2
9–13
8
Sense(–)
For technical support and more information, see inside back cover or visit www.ti.com
+
L
O
A
D
C
OUT
330µF
(Required)
+
GND
C
in
= Required 820µF
C
out
= Required 330µF

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