SM8222A/B
NIPPON PRECISION CIRCUITS INC.
Caller ID Service IC with Call Waiting
The SM8222A/B is a calling number identification
(caller ID) and call waiting signal (dual tone signal)
receiver decoder IC that conforms with the TR-
NWT-000030 and SR-TSV-002476 (Bellcore) dialer
FEATURES
s
s
s
s
s
s
s
Conforms to TR-NWT-000030 and SR-TSV-
002476 (Bellcore) standards
Call waiting
FSK demodulator
Ring signal detect circuit built-in
High input sensitivity
Input gain adjust circuit built-in
Power-down mode
APPLICATIONS
s
s
Telephones that display dialer number before and
during conversation
Adapters to display dialer number before and dur-
ing conversation
ORDERING INFORMATION
D e vice
SM8222AS
SM8222AP
SM8222BS
SM8222BP
lim
s
s
s
P ackag e
24-pin SOP
24-pin DIP
pre
24-pin DIP
24-pin SOP
ina
ry
s
s
s
s
s
s
s
OVERVIEW
telephone number display standards. It is imple-
mented in CMOS and incorporates a power-down
function for low power operation.
Crystal oscillator circuit built-in
Single supply operation
Microcontroller I/O interface
Molybdenum-gate CMOS process
24-pin SOP and 24-pin DIP packages
SM8222A : 2.7 to 3.3V operation
SM8222B : 4.5 to 5.5V operation
Answering machines
Facsimile machines
Computer peripheral devices
PINOUT
(Top View)
TIP
RING
GS
AGND
CAP
RDIN
RDRC
RDET
MODE
OSCIN
1
24
VDD
STGT
EST
STD
INT
CDET
DR
DOUT
DCLK
FSKEN
PDWN
OSCOUT
GND
12
13
IC
NIPPON PRECISION CIRCUITS—1
SM8222A/B
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Name
TIP
RING
GS
AGND
CAP
RDIN
RDRC
RDET
MODE
OSCIN
OSCOUT
GND
IC
PDWN
I/O
I
I
O
O
I
I
I/O
O
I
I
O
–
I
I
Description
Tip input: Connected to the telephone through a protection circuit.
Ring input: Connected to the telephone through a protection circuit.
Input stage amplifier output: Used to select the input amplifier gain
Analog ground: Internal reference voltage (V
DD
/2) output.
Reference voltage capacitor connection. C = 0.1 µF
Ring detect input: Line reversal and ring signal detect input. Connect to detect attenuated ring
signals. Schmitt-trigger input.
Ring detect RC connection: RC network connection to set the ring detect delay time. Open-drain
output and schmitt-trigger input.
Ring detect output: RDRC schmitt-trigger buffer output. LOW when a ring signal is detected.
FSK interface mode select: Demodulated FSK signal output method select.
LOW [Mode = 0]: Demodulated data output and data sync clock output.
HIGH [Mode = 1]: Data output in sync with an external clock.
Crystal oscillator element input: Oscillator element connection between OSCIN and OSCOUT.
Crystal oscillator element output: Oscillator element connection between OSCIN and OSCOUT.
Ground: Connect to system ground.
Test input: Tie LOW for normal operation.
Power-down control: LOW for normal operation. HIGH for device power-down state. When device is
powered-down, AGND, OSCOUT, DCLK, DOUT, INT, CDET are all HIGH. DR also goes HIGH in
mode 0 output. Schmitt-trigger input.
FSK signal output control: Demodulated FSK signal output and carrier detect output control.
Mode 0: DCLK, DOUT, DR, CDET control
Mode 1: DCLK, DOUT, CDET control
FSK signal reception enabled when HIGH.
Signal pins (above) go HIGH when FSKEN is LOW.
FSK interface clock: Demodulated FSK signal output clock.
Mode 0: Clock output in sync with data
Mode 1: Data read clock input
Data output: Demodulated FSK signal output. HIGH-level output when PDWN is HIGH or FSKEN is
LOW, or when CDET is HIGH in receive state.
15
FSKEN
16
DCLK
17
18
19
20
DOUT
DR
pre
INT
O
21
22
23
STD
EST
O
O
STGT
VDD
I/O
–
24
CDET
lim
I
I/O
O
O
O
Supply voltage
Data output trigger: Demodulated FSK data timing output. Active-LOW. Becomes active when 8 bits
of data are completed.
Carrier (FSK signal) detect output: Goes LOW when a valid carrier signal is detected.
Interrupt signal output: Goes LOW when either RDET is LOW, DR is LOW or STD is HIGH.
Dual tone indicator output: Goes HIGH if the dual tone detect signal is recognized after the external
RC circuit time delay has elapsed.
Dual tone detect output: Goes HIGH when the dual tone is detected.
Dual tone RC time constant circuit connection: External RC network connection for dual tone signal
detection processing. Sets STD output.
ina
ry
NIPPON PRECISION CIRCUITS—3
SM8222A/B
DC Electrical Characteristics
s
SM8222A
V
DD
= 3.0 ± 0.3 V, GND = 0 V, f
CLK
= 3.579545 MHz, T
a
=
−20
to 85
°C
Rating
P arameter
Symbol
Condition
min
OSCIN = PWDN = RDIN =
RDRC = MODE = 0 V,
FSKEN = V
DD
, all other
inputs open
typ
max
Unit
Current consumption
I
DD
Power-down current consumption
I
DPD
LOW-level input voltage 1
HIGH-level input voltage 1
LOW-level input voltage 2
HIGH-level input voltage 2
LOW-level input voltage 3
HIGH-level input voltage 3
LOW-level output current
HIGH-level output current
Input leakage current
Output leakage current
s
V
IL1
V
IH1
V
IL2
V
IH2
V
IL3
V
IH3
I
OL
I
OH
I
IN
lim
OSCIN, PWDN, RDIN
RDRC, INT
I
OFF
Symbol
Condition
I
DD
I
DPD
V
IL1
PWDN, MODE, FSKEN
V
IH1
V
IL2
PWDN, MODE, FSKEN
RDIN, RDRC
RDIN, RDRC
OSCIN
OSCIN
DOUT, EST, STD, STGT,
DCLK, DR, RDET, CDET
DOUT, EST, STD, STGT,
DCLK, DR, RDET, CDET
OSCIN, PWDN, RDIN
RDRC, INT
V
IH2
V
IL3
V
IH3
I
OL
I
OH
I
IN
I
OFF
SM8222B
V
DD
= 5.0 ± 0.5 V, GND = 0 V, f
CLK
= 3.579545 MHz, T
a
=
−20
to 85
°C
Rating
Unit
min
typ
max
P arameter
Current consumption
pre
Power-down current consumption
LOW-level input voltage 1
HIGH-level input voltage 1
LOW-level input voltage 2
HIGH-level input voltage 2
LOW-level input voltage 3
HIGH-level input voltage 3
LOW-level output current
HIGH-level output current
Input leakage current
Output leakage current
ina
ry
–
2.5
4.5
mA
OSCIN = RDIN = RDRC =
MODE = 0 V, PWDN =
FSKEN = V
DD
, all other
inputs open
PWDN, MODE, FSKEN
–
–
15
µA
–
–
0.3V
DD
–
V
PWDN, MODE, FSKEN
RDIN, RDRC
RDIN, RDRC
0.7V
DD
–
–
V
–
0.3V
DD
–
V
0.7V
DD
–
–
V
OSCIN
OSCIN
–
–
TBD
–
V
V
TBD
2
–
DOUT, EST, STD, STGT,
DCLK, DR, RDET, CDET
–
–
–
mA
DOUT, EST, STD, STGT,
DCLK, DR, RDET, CDET
−0.8
1
1
mA
µA
µA
−1
–
–
–
OSCIN = PWDN = RDIN =
RDRC = MODE = 0 V,
FSKEN = V
DD
, all other
inputs open
–
4.5
8.0
mA
OSCIN = RDIN = RDRC =
MODE = 0 V, PWDN =
FSKEN = V
DD
, all other
inputs open
–
–
15
µA
–
0.7V
DD
–
0.7V
DD
–
TBD
2
–
−1
–
–
–
–
–
–
–
–
–
–
–
0.3V
DD
–
0.3V
DD
–
TBD
–
–
−
0.8
1
1
V
V
V
V
V
V
mA
mA
µA
µA
NIPPON PRECISION CIRCUITS—5
DSP and ARM Processors
京公网安备 11010802033920号
EEWORLD
