74HC138D datasheet, PDF - EEWORLD Datasheet

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74HC138D: DescriptionHC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16; Categorylogic logic; File Size148KB，19 Pages; ManufacturerNXP; Websitehttps://www.nxp.com; Environmental Compliance

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74HC138D Overview

HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16

74HC138D Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	NXP
Parts packaging code	SOIC
package instruction	3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16
Contacts	16
Reach Compliance Code	unknow
ECCN code	EAR99
Other features	3 ENABLE INPUTS
series	HC/UH
Input adjustment	STANDARD
JESD-30 code	R-PDSO-G16
JESD-609 code	e4
length	9.9 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	OTHER DECODER/DRIVER
MaximumI(ol)	0.004 A
Humidity sensitivity level	1
Number of functions	1
Number of terminals	16
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output polarity	INVERTED
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Encapsulate equivalent code	SOP16,.25
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
power supply	2/6 V
Prop。Delay @ Nom-Su	45 ns
propagation delay (tpd)	225 ns
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	6 V
Minimum supply voltage (Vsup)	2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm

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74HC138; 74HCT138

3-to-8 line decoder/demultiplexer; inverting

Rev. 4 — 27 June 2012

Product data sheet

1. General description

The 74HC138; 74HCT138 is a high-speed Si-gate CMOS device and is pin compatible

with Low-power Schottky TTL (LSTTL).

The 74HC138; 74HCT138 decoder accepts three binary weighted address inputs (A0, A1

and A3) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7).

The 74HC138; 74HCT138 features three enable inputs: two active LOW (E1 and E2) and

one active HIGH (E3). Every output is HIGH unless E1 and E2 are LOW and E3 is HIGH.

This multiple enable function allows easy parallel expansion of the 74HC138; 74HCT138

to a 1-of-32 (5 lines to 32 lines) decoder with just four 74HC138; 74HCT138 ICs and one

inverter.

The 74HC138; 74HCT138 can be used as an eight output demultiplexer by using one of

the active LOW enable inputs as the data input and the remaining enable inputs as

strobes. Permanently tie unused enable inputs to their appropriate active HIGH- or

LOW-state.

The 74HC138; 74HCT138 is identical to the 74HC238; 74HCT238 but has inverting

outputs.

2. Features and benefits



Demultiplexing capability

Multiple input enable for easy expansion

Complies with JEDEC standard no. 7A

Ideal for memory chip select decoding

Active LOW mutually exclusive outputs

ESD protection:



HBM EIA/JESD22-A114F exceeds 2000 V



MM EIA/JESD22-A115-A exceeds 200 V



Multiple package options



Specified from

−40 °C

to +85

°C

and from

−40 °C

to +125

°C

74HC138D Related Products

	74HC138D	74HC138BQ	74HC138N	74HCT138N
Description	HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16	HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PQCC16	HC/UH SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDIP16	HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDIP16
Is it lead-free?	Lead free	Lead free	Lead free	Lead free
Is it Rohs certified?	conform to	conform to	conform to	conform to
Maker	NXP	NXP	NXP	NXP
Parts packaging code	SOIC	QFN	DIP	MO-001
package instruction	3.90 MM, PLASTIC, MS-012, SOT109-1, SOP-16	HVQCCN, LCC16,.1X.14,20	DIP, DIP16,.3	DIP, DIP16,.3
Contacts	16	16	16	16
Reach Compliance Code	unknow	compli	unknow	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99
series	HC/UH	HC/UH	HC/UH	HCT
Input adjustment	STANDARD	STANDARD	STANDARD	STANDARD
JESD-30 code	R-PDSO-G16	R-PQCC-N16	R-PDIP-T16	R-PDIP-T16
JESD-609 code	e4	e4	e4	e4
length	9.9 mm	3.5 mm	19.025 mm	19.025 mm
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	OTHER DECODER/DRIVER	OTHER DECODER/DRIVER	OTHER DECODER/DRIVER	OTHER DECODER/DRIVER
MaximumI(ol)	0.004 A	0.004 A	0.004 A	0.004 A
Number of functions	1	1	1	1
Number of terminals	16	16	16	16
Maximum operating temperature	125 °C	125 °C	125 °C	125 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Output polarity	INVERTED	INVERTED	INVERTED	INVERTED
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	SOP	HVQCCN	DIP	DIP
Encapsulate equivalent code	SOP16,.25	LCC16,.1X.14,20	DIP16,.3	DIP16,.3
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	IN-LINE	IN-LINE
Peak Reflow Temperature (Celsius)	260	260	NOT SPECIFIED	NOT SPECIFIED
power supply	2/6 V	2/6 V	2/6 V	5 V
Prop。Delay @ Nom-Su	45 ns	45 ns	45 ns	44 ns
propagation delay (tpd)	225 ns	225 ns	225 ns	53 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.75 mm	1 mm	4.2 mm	4.2 mm
Maximum supply voltage (Vsup)	6 V	6 V	6 V	5.5 V
Minimum supply voltage (Vsup)	2 V	2 V	2 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	YES	YES	NO	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	NICKEL PALLADIUM GOLD
Terminal form	GULL WING	NO LEAD	THROUGH-HOLE	THROUGH-HOLE
Terminal pitch	1.27 mm	0.5 mm	2.54 mm	2.54 mm
Terminal location	DUAL	QUAD	DUAL	DUAL
Maximum time at peak reflow temperature	30	30	NOT SPECIFIED	NOT SPECIFIED
width	3.9 mm	2.5 mm	7.62 mm	7.62 mm
Other features	3 ENABLE INPUTS	-	3 ENABLE INPUTS	3 ENABLE INPUTS

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