EEWORLDEEWORLDEEWORLD

Part Number

Search

5962-9318701H5A

Description
SRAM Module, 128KX32, 120ns, CMOS,
Categorystorage    storage   
File Size374KB,34 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

5962-9318701H5A Overview

SRAM Module, 128KX32, 120ns, CMOS,

5962-9318701H5A Parametric

Parameter NameAttribute value
Objectid1820273635
package instructionHIP,
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time120 ns
Other featuresUSER CONFIGURABLE AS 512K X 8
Spare memory width16
JESD-30 codeS-XHIP-P66
JESD-609 codee0
length27.3 mm
memory density4194304 bit
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of terminals66
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize128KX32
Package body materialUNSPECIFIED
encapsulated codeHIP
Package shapeSQUARE
Package formIN-LINE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height4.95 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationHEX
width27.3 mm
REVISIONS
LTR
E
DESCRIPTION
Figure 1: For case outlines 4 and 5 changed the dimension D3 min
and max limits to 1.020 and 1.060 inches. For case outlines 4 and 5
changed dimension A min limit to .135 inches. For case outlines 4
and 5 changed dimension L min limit to .132 inches. -sld
Table I; changed the max limit for I
CC32
for device types 05, 06, 07,
and 08 from 520 mA to 600 mA. Changed the max limit for I
CCDR1
for
device types 05 through 10 from 10.4 mA to 11.6 mA. -sld
Added device type 11. Added vendor CAGE 0EU86 for device types
05 through 09. -sld
Figure 1; changed the maximum limit for dimension D3 from 1.060
inches to 1.086 inches for case outlines 4 and 5. -sld
Added note to paragraph 1.2.2 and table I regarding the 4 transistor
design. Added footnote 3 for case outlines U, T, X, and Y on the
bulletin page. Redrew entire document. -sld
Added device types 12 through 18. -sld
Updated drawing. -gz
Update drawing to the latest requirements of MIL-PRF-38534. –gc
DATE (YR-MO-DA)
98-04-06
APPROVED
K. A. Cottongim
F
98-07-13
K. A. Cottongim
G
H
J
99-08-27
00-02-07
00-11-14
Raymond Monnin
Raymond Monnin
Raymond Monnin
K
L
M
01-11-13
07-04-16
18-01-23
Raymond Monnin
Robert M. Heber
Charles F. Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
M
15
M
16
M
17
M
18
REV
SHEET
PREPARED BY
Steve L. Duncan
CHECKED BY
Michael C. Jones
M
19
M
20
M
21
M
1
M
22
M
2
M
23
M
3
M
24
M
4
M
25
M
5
M
26
M
6
M
7
M
8
M
9
M
10
M
11
M
12
M
13
M
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.dla.mil/landandmaritime
APPROVED BY
Kendall A. Cottongim
MICROCIRCUIT, HYBRID, DIGITAL, STATIC
RANDOM ACCESS MEMORY, CMOS, 128K x
32-BIT
DRAWING APPROVAL DATE
94-06-24
REVISION LEVEL
M
SIZE
A
SHEET
CAGE CODE
67268
1 OF
26
5962-93187
5962-E208-18
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release. Distribution is unlimited.
Happy to get new underwear, scattered around~~~~~~
RT~~~~~...
michaeljaung Embedded System
Knowledge and skills required for qualified electronic engineers
Knowledge and skills required for qualified electronic engineers...
fighting Embedded System
Regarding the question of whether DC has reflected voltage (current), please ask again
Hello everyone, I have already asked friends in the forum about whether DC has reflected voltage (current). I read the transmission line theory again a few days ago and brought some thoughts and calcu...
secondlife110 RF/Wirelessly
TMS320C6678 external memory DDR3 hardware design and software debugging
1. Hardware DesignThis design refers to the sample design of TI. On the basis of the sample, in order to save cost and space, the ECC of DDR3 is deleted. Only 4 pieces of Samsung's K4B1G1646G are left...
Aguilera DSP and ARM Processors
The WinCE device is identified as a USB disk.
Hello everyone. My development platform is S3C2410+WINCE5.0, and I want to make the WINCE device be recognized as a USB disk when it is connected to the PC via a USB cable. I changed the relevant regi...
liplip Embedded System
Allegro software usage
When placing a component in Allegro, it says W- (SPMHUT-48): Scaled value has been rounded off. Why can't the component be placed? I searched online and found that some people said the board frame is ...
一战到底 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 22  620  1543  292  2353  1  13  32  6  48 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号