Security & Chip Card ICs
SLE 66CX640P
16-Bit Security Controller
with Memory Management and Protection Unit
in 0.25 µm CMOS Technology
136-Kbyte ROM, 5052 bytes RAM, 64-Kbyte EEPROM
1100-Bit Advanced Crypto Engine and
112-Bit/ 192-Bit DDES EC2 Accelerator
Short Product Information 08.01
SLE 66CX640P Short Product Information
Ref.: SPI_SLE66CX640P_0801doc
This document contains preliminary information on a new product under development.
Details are subject to change without notice.
Revision History: Current Version 08.01
Previous Releases: 03.00
Page
3
Subjects (changes since last revision)
RMS size corrected from 2 Kbytes to 1 Kbytes
Important:
Further information is confidential and on request. Please contact:
Infineon Technologies AG in Munich, Germany,
Security & Chip Card ICs,
Tel +49 - (0)89 234-80000
Fax +49 - (0)89 234-81000
E-Mail: security.chipcard.ics@infineon.com
Edition 2001
Published by Infineon Technologies AG, CC Applications Group
St.-Martin-Strasse 53, D-81541 München
© Infineon Technologies AG 2001
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon
Technologies Office in Germany or our Infineon Technologies Representatives world-wide (see address list).
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of
that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices
or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect
human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
SLE 66CX640P
16-Bit Security Controller with MMU in 0.25µm CMOS Technology
136-Kbyte ROM, 5052 bytes RAM, 64-Kbyte EEPROM
1100-Bit Advanced Crypto Engine and
112-Bit/ 192-Bit DDES Accelerator
Features
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ESD protection larger than 6 kV
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16-bit microcomputer in 0.25 µm CMOS
technology
Instruction set opcode compatible with
standard SAB 8051 processor
Enhanced 16-bit arithmetic
Additional powerful instructions optimized
for chip card applications
Dedicated, non-standard architecture with
execution time 6 times faster (18 times
by PLLmax)
than standard SAB 8051
processor at same external clock
135 Kbytes User ROM
for application
programs
Additional 1 Kbytes reserved ROM for
Resource Management System (RMS+)
with intelligent EEPROM write/erase
routines
64 Kbytes EEPROM
4 Kbytes
XRAM, 256 (+700) bytes internal
RAM
Memory Management and Protection
Unit (MMU)
Dual Key Triple DES (DDES) and EC2
GF (2
n
) Accelerator
Advanced Crypto Engine for up to 2048
bit RSA computation
CRC Module
Interrupt Module
PLL
Two 16-bit Autoreload Timer
Power saving sleep mode
Ext. Clock freq. 1 to 7.5 MHz for int.
Clock
≤
10 MHz
UART for handling serial interface
in
accordance with ISO/IEC 7816 part 3
supporting transmission protocols T=1
and T=0
I/O routines realized in software executable
Supply voltage range: 2.7 V to 5.5 V
EEPROM
Reading, erasing and writing byte by byte
Flexible page mode for 1 to 64 bytes
write/erase operation
32 bytes security area (OTP)
Erase + Write time < 4.5 ms
Minimum of 500.000 write/erase cycles at
25°C
Data retention for a minimum of 10 years
EEPROM programming voltage generated on
chip
Memory Management and Protection Unit
Addressable memory up to 1 MByte
Separates OS (system) and application
(user)
System routines called by traps
OS can restrict access to peripherals in
application mode
Code execution from XRAM possible
Security Features
Operation state monitoring mechanism
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Low and high voltage sensors
Frequency sensors and filters
Memory Security
16 bytes security PROM, hardware
protected
Unique chip identification number for each
chip
MED – memory encryption/decryption
device for XRAM, ROM and EEPROM
True Random Number Generator with
Firmware test function
Security optimised layout and layout
scrambling
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Short Product Information
3/9
08.01
SLE 66CX640P
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Current consumption
< 10mA @ 5.5 V
< 6 mA @ 3.3 V
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Temperature range: -25 to +85°C
Document References
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Testmode
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Irreversible Lock - Out of testmode
Confidential Data Book SLE 66CxxxP
Qualification report
Chip delivery specification for wafer with
chip-layout (die size, orientation,...)
Module specification containing description
of package, etc.
Qualification report module
Anti Snooping
Development Tools Overview
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HW-countermeasures against SPA/DPA-,
Timing- and DFA-attacks (differential fault
analysis – DFA)
CRC – Module
Non standard dedicated Smart Card CPU
– Core
Active Shield with automatic and user
controlled attack detection
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Support
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Short Product Information Smart Mask
Package
Short
Product
Information
Software
Development Kit SDK CC
Short Product Information Card Emulator
CE66P
Short Product Information ROM Monitor
RM66P
Short Product Information Emulator ET66P
Hitex or ET66P KSC
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HW-& SW-Tools (Emulator, ROM Monitor,
Card Emulator, Simulator, Softmasking)
Application notes
Supported Standards
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ISO/IEC 7816
EMV 2000
GSM 11.1x
ETS I TS 102 221
Short Product Information
4/9
08.01
SLE 66CX640P
Performance Advanced Crypto Engine
Operation
Modulus
Exponent
5MHz
Modular Exponentiation
RSA Encrypt / RSA Signature Verify
Modular Exponentiation
RSA Decrypt / RSA Signature
Generate
Modular Exponentiation using CRT
RSA Decrypt / RSA Signature
Generate
DSA Signature Generate
DSA Signature Verify
DSA Signature Generate
DSA Signature Verify
1024 bit
1024 bit
17 bit
1024 bit
20 ms
820 ms
Calculation Time
10 MHz
11 ms
410 ms
15 MHz
7 ms
273 ms
Eq.1024 bit eq.1024 bit 250 ms
125 ms
83 ms
512 bit
512 bit
1024 bit
1024 bit
160 bit
160 bit
160 bit
160 bit
97ms
117 ms
438 ms
711 ms
49 ms
59 ms
219 ms
356 ms
32 ms
39 ms
146 ms
237 ms
Performance DDES-EC2 Accelerator
Operation
Data Block
Length
Encryption Time for an
8-Byte Block incl. Data
Transfer
5 MHz 10 MHz 15 MHz
56-bit Single DES Encryption
112-bit Triple DES Encryption
64 bit
64 bit
Operand
Length
Elliptic Curves GF(2
n
) EC-DSA Signature Generate
Elliptic Curves GF(2
n
) EC-DSA Signature Verify
192 bit
192 bit
23 µs
35 µs
11 µs
17 µs
8 µs
12 µs
Calculation Time
5 MHz 10 MHz 15 MHz
285 ms 142 ms 95 ms
540 ms 270 ms 180 ms
Short Product Information
5/9
08.01
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