ASM3P2969A
Low Power Peak EMI
Reducing Solution
Description
The ASM3P2969A is a versatile spread spectrum frequency
modulator designed specifically for a wide range of clock frequencies.
The ASM3P2969A reduces electromagnetic interference (EMI) at the
clock source, allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2969A allows significant system cost
savings by reducing the number of circuit board layers, ferrite beads
and shielding that are traditionally required to pass EMI regulations.
The ASM3P2969A uses the most efficient and optimized
modulation profile approved by the FCC and is implemented by using
a proprietary all digital method.
The ASM3P2969A modulates the output of a single PLL in order to
“spread” the bandwidth of a synthesized clock, and more importantly,
decreases the peak amplitudes of its harmonics. This results in
significantly lower system EMI compared to the typical narrow band
signal produced by oscillators and most frequency generators.
Lowering EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation.’
Applications
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TSOT−6
O SUFFIX
CASE 419AF
TSSOP−8
T SUFFIX
CASE 948AL
SOIC−8
S SUFFIX
CASE 751BD
PIN CONFIGURATIONS
1
REFOUT/2
XOUT
XIN / CLKIN
VSS
ModOUT
VDD
The ASM3P2969A is targeted towards all portable devices with
very low power requirements like MP3 players, Notebooks and digital
still cameras.
Features
6−Pin TSOT−23 Package
(Top View)
1
XIN / CLKIN
XOUT
REFOUT/2
NC
VDD
NC
ModOUT
VSS
•
•
•
•
•
•
•
•
•
•
Generates an EMI Optimized Clock Signal at the Output
Integrated Loop Filter Components
Operates with a 3.3 V / 2.5 V Supply
Operating Current less than 4 mA
Low Power CMOS Design
Input Frequency Range:
6 MHz to 12 MHz for 2.5 V
6 MHz to 13 MHz for 3.3 V
Generates a 1X Low EMI Spread Spectrum Clock of the Input
Frequency
Frequency Deviation:
±1%
@ 10 MHz
Available in 6−pin TSOT−23, 8−pin SOIC and 8−pin TSSOP
Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
8−Pin SOIC and TSSOP Packages
(Top View)
KEY SPECIFICATIONS
Description
Supply Voltages
Cycle−to−Cycle Jitter
Output Duty Cycle
Modulation Rate Equation
Frequency Deviation
Specification
VDD = 3.3 V / 2.5 V
200 pS (Max)
45/55%
F
IN
/256
±1%
@ 10 MHz
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
©
Semiconductor Components Industries, LLC, 2011
August, 2011
−
Rev. 3
1
Publication Order Number:
ASM3P2969A/D
ASM3P2969A
VDD
Modulation
XIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
DIV/2
REFOUT/2
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
VSS
Figure 1. Block Diagram
Table 1. PIN DESCRIPTION (6−Pin TSOT−23 Package)
Pin#
1
2
3
4
5
6
Pin Name
REFOUT/2
XOUT
XIN / CLKIN
VDD
ModOUT
VSS
Type
O
O
I
P
O
P
Description
Buffered and divided by 2 output of the input frequency.
Crystal connection. If using an external reference, this pin must be left unconnected.
Crystal connection or external reference frequency input. This pin has dual functions. It can be
connected either to an external crystal or an external reference clock.
Power supply for the entire chip.
Spread spectrum clock output.
Ground connection.
Table 2. PIN DESCRIPTION (8−Pin SOIC and TSSOP Packages)
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN / CLKIN
XOUT
REFOUT/2
NC
VSS
ModOUT
NC
VDD
Type
I
O
O
−
P
O
−
P
Description
Crystal connection or external reference frequency input. This pin has dual functions. It can be
connected either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left unconnected.
Buffered and divided by 2 output of the input frequency.
No connect.
Ground connection.
Spread spectrum clock output.
No connect.
Power supply for the entire chip.
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2
ASM3P2969A
Figure 2. Modulation Profile
Table 3. SPECIFICATIONS
Description
Frequency Range
For 2.5 V Supply
For 3.3 V Supply
Modulation Equation
Frequency Deviation
Specification
6 MHz < CLKIN < 12 MHz
6 MHz < CLKIN < 13 MHz
F
IN
/256
±1%
@ 10 MHz
Table 4. ABSOLUTE MAXIMUM RATINGS
Symbol
VDD, V
IN
T
STG
T
A
T
s
T
J
T
DV
Parameter
Voltage on any pin with respect to Ground
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage (As per JEDEC STD22− A114−B)
Rating
−0.5
to +4.6
−65
to +125
−40
to +85
260
150
2
Unit
V
°C
°C
°C
°C
KV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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3
ASM3P2969A
Table 5. DC ELECTRICAL CHARACTERISTICS FOR 2.5 V SUPPLY
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated.)
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
DD
I
CC
VDD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
Input high current
XOUT output low current (@ 0.5 V, VDD = 2.5 V)
XOUT output high current (@ 1.8 V, VDD = 2.5 V)
Output low voltage (VDD = 2.5 V, I
OL
= 8 mA)
Output high voltage (VDD = 2.5 V, I
OH
= 8 mA)
Static supply current (Note 1)
Dynamic supply current (2.5 V, 10 MHz and no load)
Operating Voltage
Power−up time (first locked cycle after power−up)
Output impedance
Parameter
Min
VSS−0.3
2.0
−
−
−
−
−
1.8
−
−
2.375
−
−
Typ
−
−
−
−
3
3
−
−
1.0
2.5
2.5
−
50
Max
0.8
VDD+0.3
−35
35
−
−
0.6
−
−
−
2.625
5
−
Unit
V
V
mA
mA
mA
mA
V
V
mA
mA
V
mS
W
1. XIN / CLKIN pin is pulled low.
Table 6. AC ELECTRICAL CHARACTERISTICS FOR 2.5 V SUPPLY
Symbol
CLKIN
ModOUT
f
d
t
LH
(Note 2)
t
HL
(Note 2)
t
JC
t
D
Input frequency
Output frequency
Frequency Deviation
Input Frequency = 6 MHz
Input Frequency = 12 MHz
Output rise time (measured from 0.7 V to 1.7 V)
Output fall time (measured from 1.7 V to 0.7 V)
Jitter (Cycle−to−Cycle)
Output duty cycle
Parameter
Min
6
6
−
−
0.7
0.4
−
45
Typ
−
−
±1.5
±0.8
1.4
0.9
−
50
Max
12
12
−
−
1.7
1.1
200
55
nS
nS
pS
%
Unit
MHz
MHz
%
2. t
LH
and t
HL
are measured into a capacitive load of 15 pF.
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ASM3P2969A
Table 7. DC ELECTRICAL CHARACTERISTICS FOR 3.3 V SUPPLY
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated.)
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
DD
I
CC
VDD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
Input high current
XOUT output low current (@ 0.4 V, VDD = 3.3 V)
XOUT output high current (@ 2.5 V, VDD = 3.3 V)
Output low voltage (VDD = 3.3 V, I
OL
= 8 mA)
Output high voltage (VDD = 3.3 V, I
OH
= 8 mA)
Static supply current (Note 3)
Dynamic supply current (3.3 V, 10 MHz and no load)
Operating Voltage
Power−up time (first locked cycle after power−up)
Output impedance
Parameter
Min
VSS−0.3
2.0
−
−
−
−
−
2.5
−
−
2.7
−
−
Typ
−
−
−
−
3
3
−
−
1.1
3.5
3.3
−
45
Max
0.8
VDD+0.3
−35
35
−
−
0.4
−
−
−
3.6
5
−
Unit
V
V
mA
mA
mA
mA
V
V
mA
mA
V
mS
W
3. XIN / CLKIN pin is pulled low.
Table 8. AC ELECTRICAL CHARACTERISTICS FOR 3.3 V SUPPLY
Symbol
CLKIN
ModOUT
f
d
t
LH
(Note 4)
t
HL
(Note 4)
t
JC
t
D
Input frequency
Output frequency
Frequency Deviation
Input Frequency = 6 MHz
Input Frequency = 13 MHz
Output rise time (measured from 0.8 V to 2.0 V)
Output fall time (measured at 2.0 V to 0.8 V)
Jitter (Cycle−to−Cycle)
Output duty cycle
Parameter
Min
6
6
−
−
0.4
0.4
−
45
Typ
−
−
±1.5
±0.75
1.2
1.0
−
50
Max
13
13
−
−
1.5
1.2
200
55
nS
nS
pS
%
Unit
MHz
MHz
%
4. t
LH
and t
HL
are measured into a capacitive load of 15 pF.
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