Data Sheet
FEATURES
Programmable capacitance-to-digital converter
36 ms update rate (at maximum sequence length)
Better than 1 fF resolution
14 capacitance sensor input channels
No external RC tuning components required
Automatic conversion sequencer
On-chip automatic calibration logic
Automatic compensation for environmental changes
Automatic adaptive threshold and sensitivity levels
On-chip RAM to store calibration data
SPI-compatible serial interface (AD7142)
I
2
C-compatible serial interface (AD7142-1)
Separate V
DRIVE
level for serial interface
Interrupt output and GPIO
32-lead, 5 mm x 5 mm LFCSP
2.6 V to 3.6 V supply voltage
Low operating current
Full power mode: less than 1 mA
Low power mode: 50 µA
Programmable Controller for
Capacitance Touch Sensors
AD7142
FUNCTIONAL BLOCK DIAGRAM
V
REF–
V
REF+
29
28
TEST
27
CIN0
CIN1
CIN2
CIN3
CIN4
CIN5
CIN6
CIN7
CIN8
CIN9
CIN10
CIN11
CIN12
CIN13
30
31
32
1
2
3
POWER-ON
RESET
LOGIC
13
14
AV
CC
AGND
SWITCH
MATRIX
4
5
6
7
8
9
10
11
16-BIT
Σ-Δ
CDC
CALIBRATION
ENGINE
17
DV
CC
DGND1
DGND2
CALIBRATION
RAM
CONTROL
AND
DATA
REGISTERS
18
19
C
SHIELD
SRC
SRC
12
15
16
250kHz
EXCITATION
SOURCE
V
DRIVE
20
SERIAL INTERFACE
AND CONTROL LOGIC
INTERRUPT
AND GPIO
LOGIC
26
GPIO
21
22
23
24
25
APPLICATIONS
Personal music and multimedia players
Cell phones
Digital still cameras
Smart hand-held devices
Television, A/V, and remote controls
Gaming consoles
SDO/
SDA
SDI/ SCLK CS/
ADD0
ADD1
INT
Figure 1.
GENERAL DESCRIPTION
The AD7142 and AD7142-1 are integrated capacitance-to-
digital converters (CDCs) with on-chip environmental
calibration for use in systems requiring a novel user input
method. The AD7142 and AD7142-1 can interface to external
capacitance sensors implementing functions such as capacitive
buttons, scroll bars, or wheels.
The CDC has 14 inputs channeled through a switch matrix to a
16-bit, 250 kHz sigma-delta (∑-∆) capacitance-to-digital
converter. The CDC is capable of sensing changes in the
capacitance of the external sensors and uses this information to
register a sensor activation. The external sensors can be
arranged as a series of buttons, as a scroll bar or wheel, or as a
combination of sensor types. By programming the registers, the
user has full control over the CDC setup. High resolution
sensors require minor software to run on the host processor.
Rev. B
The AD7142 and AD7142-1 have on-chip calibration logic to
account for changes in the ambient environment. The
calibration sequence is performed automatically and at
continuous intervals, when the sensors are not touched. This
ensures that there are no false or nonregistering touches on the
external sensors due to a changing environment.
The AD7142 has an SPI-compatible serial interface, and the
AD7142-1 has an I
2
C-compatible serial interface. Both parts
have an interrupt output, as well as a general-purpose input/
output (GPIO).
The AD7142 and AD7142-1 are available in a 32-lead, 5 mm ×
5 mm LFCSP and operate from a 2.6 V to 3.6 V supply. The
operating current consumption is less than 1 mA, falling to
50 µA in low power mode (conversion interval of 400 ms).
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
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05702-001
AD7142
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 3
Specifications..................................................................................... 4
SPI Timing Specifications (AD7142) ......................................... 6
I
2
C Timing Specifications (AD7142-1) ..................................... 7
Absolute Maximum Ratings ............................................................ 8
ESD Caution .................................................................................. 8
Pin Configurations and Function Descriptions ........................... 9
Typical Performance Characteristics ........................................... 10
Theory of Operation ...................................................................... 12
Capacitance Sensing Theory ..................................................... 12
Operating Modes ........................................................................ 13
Capacitance Sensor Input Configuration .................................... 14
CIN Input Multiplexer Setup .................................................... 14
Capacitance-to-Digital Converter ................................................ 15
Oversampling the CDC Output ............................................... 15
Capacitance Sensor Offset Control .......................................... 15
Conversion Sequencer ............................................................... 15
CDC Conversion Sequence Time ............................................ 16
CDC Conversion Results ........................................................... 17
Noncontact Proximity Detection ................................................. 18
Recalibration ............................................................................... 18
Proximity Sensitivity .................................................................. 18
FF_SKIP_CNT ............................................................................ 21
Environmental Calibration ........................................................... 23
Capacitance Sensor Behavior Without Calibration ............... 23
Data Sheet
Capacitance Sensor Behavior with Calibration ...................... 23
Slow FIFO .................................................................................... 24
SLOW_FILTER_UPDATE_LVL .............................................. 24
Adaptive Threshold and Sensitivity ............................................. 25
Interrupt Output ............................................................................. 27
CDC Conversion Complete Interrupt ..................................... 27
Sensor Touch Interrupt.............................................................. 27
GPIO INT Output Control ....................................................... 29
Outputs ............................................................................................ 31
Excitation Source ........................................................................ 31
C
SHIELD
Output ............................................................................. 31
GPIO ............................................................................................ 31
Using the GPIO to Turn On/Off an LED ................................ 31
Serial Interface ................................................................................ 32
SPI Interface ................................................................................ 32
I
2
C Compatible Interface ........................................................... 34
V
DRIVE
Input ................................................................................. 36
PCB Design Guidelines ................................................................. 37
Capacitive Sensor Board Mechanical Specifications ............. 37
Chip Scale Packages ................................................................... 37
Power-Up Sequence ....................................................................... 38
Typical Application Circuits ......................................................... 39
Register Map ................................................................................... 40
Detailed Register Descriptions ..................................................... 41
Bank 1 Registers ......................................................................... 41
Bank 2 Registers ......................................................................... 51
Bank 3 Registers ......................................................................... 58
Outline Dimensions ....................................................................... 70
Ordering Guide .......................................................................... 70
Rev. B | Page 2 of 70
Data Sheet
REVISION HISTORY
9/2017—Rev. A to Rev. B
Changes to Figure 6, Figure 7, and Table 7 .................................... 9
Changes to Figure 59 ......................................................................40
Updated Outline Dimensions ........................................................70
Changes to Ordering Guide ...........................................................70
1/2007—Rev. 0 to Rev. A
Updated Format.................................................................. Universal
Changes to Data Sheet Title ............................................................. 1
Inserted Figure 5................................................................................ 8
Changes to Figure 18 ......................................................................12
Changes to Operating Modes Section ..........................................13
Changes to CIN Input Multiplexer Setup Section ......................14
Changes to Table 9 and Conversion Sequencer Section ............15
Changes to Noncontact Proximity Detection Section ...............18
Changes to Recalibration Section and Table 12 ..........................18
Deleted FIFO Control Section .......................................................19
Changes to Figure 31 and Table 13 ...............................................20
Changes to Figure 32 ......................................................................21
AD7142
Changes to Capacitance Sensor Behavior with Calibration
Section .............................................................................................. 22
Added Slow FIFO and SLOW_FILTER_UPDATE_LVL
Section .............................................................................................. 23
Changes to Adaptive Threshold and Sensitivity Section ........... 24
Inserted Figure 37 and Table 13 .................................................... 25
Deleted Figure 42 ............................................................................ 29
Changes to C
SHIELD
Output Section ............................................... 30
Changes to Figure 55 ...................................................................... 36
Changes to Power-up Sequence Section ...................................... 37
Changes to Figure 58 ...................................................................... 38
Changes to Table 21 ........................................................................ 42
Changes to Table 24 ........................................................................ 43
Changes to Table 25 ........................................................................ 44
Changes to Table 29 ........................................................................ 48
Changes to Table 31 ........................................................................ 49
6/2006—Revision 0: Initial Version
Rev. B | Page 3 of 70
AD7142
SPECIFICATIONS
AV
CC
, DV
CC
= 2.6 V to 3.6 V, T
A
= −40
o
C to +85°C, unless otherwise noted.
Table 1.
Parameter
CAPACITANCE-TO-DIGITAL CONVERTER
Update Rate
Resolution
CIN Input Range
1
No Missing Codes
CIN Input Leakage
Total Unadjusted Error
Output Noise (Peak-to-Peak)
Output Noise (RMS)
Parasitic Capacitance
C
BULK
Offset Range
1
C
BULK
Offset Resolution
Low Power Mode Delay Accuracy
EXCITATION SOURCE
Frequency
Output Voltage
Short-Circuit Source Current
Short-Circuit Sink Current
Maximum Output Load
C
SHIELD
Output Drive
C
SHIELD
Bias Level
LOGIC INPUTS (SDI, SCLK, CS, SDA, GPI TEST)
V
IH
Input High Voltage
V
IL
Input Low Voltage
I
IH
Input High Voltage
I
IL
Input Low Voltage
Hysteresis
OPEN-DRAIN OUTPUTS (SCLK, SDA, INT)
V
OL
Output Low Voltage
I
OH
Output High Leakage Current
LOGIC OUTPUTS (SDO, GPO)
V
OL
Output Low Voltage
V
OH
Output High Voltage
SDO Floating State Leakage Current
GPO Floating State Leakage Current
POWER
AV
CC
, DV
CC
V
DRIVE
I
CC
±20
156.25
4
240
250
20
50
250
10
AV
CC
/2
0.7 × V
DRIVE
0.4
−1
1
150
0.4
±1
0.4
V
DRIVE
− 0.6
−5
2.6
1.65
3.3
0.9
16
2.25
1
Data Sheet
Min
35.45
Typ
36.86
16
±2
25
Max
38.4
Unit
ms
Bit
pF
Bit
nA
%
Codes
Codes
Codes
Codes
pF
pF
fF
%
kHz
V
mA
mA
pF
µA
V
V
V
µA
µA
mV
V
µA
V
V
µA
µA
V
V
mA
µA
µA
µA
µA
Test Conditions/Comments
12 conversion stages in sequencer, decimation rate = 256
16
±20
7
3
0.8
0.5
40
Guaranteed by design, but not production tested
Decimation rate = 128
Decimation rate = 256
Decimation rate = 128
Decimation rate = 256
Parasitic capacitance to ground, per CIN input
guaranteed by characterization
% of 200 ms, 400 ms, 600 ms, or 800 ms
260
AV
CC
Capacitance load on source to ground
V
IN
= V
DRIVE
V
IN
= DGND
0.1
I
SINK
= −1 mA
V
OUT
= V
DRIVE
I
SINK
= 1 mA, V
DRIVE
= 1.65 V to 3.6 V
I
SOURCE
= 1 mA, V
DRIVE
= 1.65 V to 3.6 V
Pin three-state, leakage measured to GND and DV
CC
Pin three-state, leakage measured to GND and DV
CC
±1
2
3.6
3.6
1
20
33
4.5
18
Serial interface operating voltage
In full power mode
Low power mode, converter idle, T
A
= 25°C
Low power mode, converter idle
Full shutdown, T
A
= 25°C
Full shutdown
C
IN
and C
BULK
are defined in Figure 2.
Rev. B | Page 4 of 70
Data Sheet
PLASTIC OVERLAY
SENSOR BOARD
CAPACITIVE SENSOR
C
IN
C
BULK
05702-054
AD7142
Figure 2.
Table 2. Typical Average Current in Low Power Mode, AV
CC
, DV
CC
= 3.6 V, T= 25°C, Load of 50 pF on SRC Pin, No Load on SRC
Number of Conversion Stages (Current Values Expressed in μA)
Low Power Mode
Delay
200 ms
400 ms
600 ms
800 ms
Decimation
Rate
128
256
128
256
128
256
128
256
1
26.4
35.6
21.3
26
19.6
22.7
18.7
21.1
2
33.3
49.1
24.8
32.9
21.9
27.4
20.5
24.6
3
40.1
62.2
28.3
39.7
24.3
32
22.2
28.1
4
46.9
74.9
31.7
46.5
26.6
36.6
24
31.5
5
53.5
87.3
35.2
53.1
28.9
41.1
25.7
35
6
60
99.3
38.6
59.6
31.2
45.6
27.5
38.4
7
66.5
111
42
66.1
33.5
50
29.2
41.8
8
72.8
122.3
45.4
72.4
35.8
54.4
31
45.2
9
79.1
133.4
48.7
78.7
38.1
58.8
32.7
48.5
10
85.2
144.2
52
84.9
40.4
63.1
34.4
51.8
11
91.3
154.7
55.3
91
42.6
67.4
36.1
55.1
12
97.3
164.9
58.6
97
44.8
71.6
37.8
58.4
Table 3. Maximum Average Current in Low Power Mode, AV
CC
, DV
CC
= 3.6 V, Load of 50 pF on SRC Pin, No Load on SRC
Number of Conversion Stages (Current Values Expressed in μA)
Low Power Mode
Delay
200 ms
400 ms
600 ms
800 ms
Decimation
Rate
128
256
128
256
128
256
128
256
1
45.4
56.2
39.5
45
37.5
41.2
36.5
39.3
2
53.6
72
43.6
53.1
40.3
46.7
38.6
43.4
3
61.5
87.2
47.7
61.1
43
52.1
40.7
47.5
4
69.4
102
51.8
68.9
45.8
57.4
42.7
51.5
5
77.1
116.3
55.8
76.7
48.5
62.7
44.8
55.6
6
84.7
130.2
59.8
84.3
51.2
67.9
46.8
59.5
7
92.2
143.7
63.7
91.8
53.9
73.1
48.8
63.5
8
99.6
156.8
67.6
99.1
56.5
78.2
50.9
67.4
9
106.8
169.5
71.5
106.4
59.2
83.3
52.9
71.3
10
113.9
181.8
75.4
113.6
61.8
88.3
54.9
75.2
11
121
193.8
79.2
120.6
64.5
93.3
56.9
79
12
127.9
205.5
83
127.5
67.1
98.2
58.9
82.8
Rev. B | Page 5 of 70
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