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IDT70V659S

Description
HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
File Size205KB,25 Pages
ManufacturerETC2
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IDT70V659S Overview

HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM

HIGH-SPEED 3.3V
IDT70V659/58/57S
128/64/32K x 36
ASYNCHRONOUS DUAL-PORT
STATIC RAM
Features
True Dual-Port memory cells which allow simultaneous
access of the same memory location
High-speed access
– Commercial: 10/12/15ns (max.)
– Industrial: 12/15ns (max.)
Dual chip enables allow for depth expansion without
external logic
IDT70V659/58/57 easily expands data bus width to 72 bits
or more using the Master/Slave select when cascading
more than one device
M/S = V
IH
for
BUSY
output flag on Master,
M/S = V
IL
for
BUSY
input on Slave
Busy and Interrupt Flags
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
Separate byte controls for multiplexed bus and bus
matching compatibility
Supports JTAG features compliant to IEEE 1149.1
LVTTL-compatible, single 3.3V (±150mV) power supply for
core
LVTTL-compatible, selectable 3.3V (±150mV)/2.5V (±100mV)
power supply for I/Os and control signals on each port
Available in a 208-pin Plastic Quad Flatpack, 208-ball fine
pitch Ball Grid Array, and 256-ball Ball Grid Array
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
BE
3R
BE
2R
BE
1R
BE
0R
Functional Block Diagram
BE
3L
BE
2L
BE
1L
BE
0L
R/
W
L
CE
0L
CE
1L
B
E
0
L
B
E
1
L
B
E
2
L
B
E
3
L
BBBB
EEEE
3 2 10
RRRR
R/
W
R
CE
0R
CE
1R
OE
L
Dout0-8_L
Dout0-8_R
Dout9-17_L
Dout9-17_R
Dout18-26_L Dout18-26_R
Dout27-35_L Dout27-35_R
OE
R
128/64/32K x 36
MEMORY
ARRAY
I/O
0L-
I/O
35L
Di n_L
Di n_R
I/O
0R -
I/O
35R
A
16 L(1)
A
0L
Address
Decoder
ADDR_L
ADDR_R
Address
Decoder
A
16R(1)
A
0R
CE
0L
CE
1L
OE
L
R/W
L
BUSY
L(2,3)
SEM
L
INT
L(3)
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
OE
R
R/W
R
CE
0R
CE
1R
M/S
BUSY
R(2,3)
SEM
R
INT
R(3)
TDI
TDO
JTAG
TMS
TCK
TRST
4869 drw 01
NOTES:
1. A
16
is a NC for IDT70V658. Also, Addresses A
16
and A
15
are NC's for IDT70V657.
2.
BUSY
is an input as a Slave (M/S=V
IL
) and an output when it is a Master (M/S=V
IH
).
3.
BUSY
and
INT
are non-tri-state totem-pole outputs (push-pull).
OCTOBER 2008
DSC-4869/7
1
©2008 Integrated Device Technology, Inc.

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Description HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM HIGH-SPEED 3.3V 128/64/32K x 36 ASYNCHRONOUS DUAL-PORT STATIC RAM
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