IP2003ATR datasheet, PDF - EEWORLD Datasheet

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IP2003ATR: DescriptionFull function muliphase builiding block; CategoryPower/power management The power supply circuit; File Size367KB，11 Pages; ManufacturerInternational Rectifier （ Infineon ）; Websitehttp://www.irf.com/

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IP2003ATR Overview

Full function muliphase builiding block

IP2003ATR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	incompatible
Maker	International Rectifier （ Infineon ）
package instruction	LGA, LGA10(UNSPEC)
Reach Compliance Code	unknow
control mode	VOLTAGE-MODE
Number of terminals	10
Maximum output current	40 A
Package body material	PLASTIC/EPOXY
encapsulated code	LGA
Encapsulate equivalent code	LGA10(UNSPEC)
Package form	GRID ARRAY
Certification status	Not Qualified
surface mount	YES
Maximum switching frequency	1000 kHz
technology	HYBRID
Terminal form	BUTT
Terminal location	BOTTOM

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PD-96987A

iP2003A

Synchronous Buck

Multiphase Optimized LGA Power Block

Features:

Integrated Power Semiconductors, Drivers & Passives

Full function multiphase building block

Output current 40A continuous with no derating up to

PCB

= 100°C and T

CASE

= 100°C

Operating frequency up to 1.0 MHz

Proprietary packaging enables ultra low Rth

j-case top

Efficient dual sided cooling

Small footprint low profile (9mm x11mm x 2.2mm) package

Optimized for very low power losses

LGA interface

Ease of design

iP2003A Power Block

Description

The iP2003A is a fully optimized solution for high current synchronous buck multiphase applications.

Board space and design time are greatly reduced because most of the components required for each

phase of a typical discrete-based multiphase circuit are integrated into a single 9mm x 11mm x 2.2mm

power block. The only additional components required for a complete multiphase converter are a PWM

controller, the output inductors, and the input and output capacitors.

iPOWIR technology offers designers an innovative board space saving solution for applications

requiring high power densities. iPOWIR technology eases design for applications where component integration

offers benefits in performance and functionality. iPOWIR technology solutions are also optimized internally for

layout, heat transfer and component selection.

Pin #

Pin N am e

Pin Function

Supply voltage for the internal circuitry.

iP2003A Internal Block Diagram

SWS1

SWS2

ENA BLE

W hen set to logic level high, internal circuitry

of the device is enabled. W hen set to logic

level low, the PRD Y pin is forced low, the

Control and Sychronous switches are turned

off, and the supply current reduces to 10µ A.

T T L-level input signal to M OSFET drivers.

Power Ready - This pin indicates the status of

EN AB LE or V

D D

. T his output will be driven

low when EN ABLE is logic low or when V

D D

is less than 4.4V (typ.). W hen EN AB LE is

logic high and V

D D

is greater than 4.4V (typ.),

this output is driven high. T his output has a

10mA source and 1mA sink capability.

Power G round - connection to the ground of

bulk and filter capacitors.

Switching N ode - connection to the output

inductor.

Input voltage pin. External bypass ceramic

capacitors must be added directly next to the

block.

Floating pin. For internal use. E xternally, short

to V

SW S2

pin only

Floating pin. For internal use. E xternally, short

to V

SW S1

pin only

PW M

PRDY

ENABLE

PWM

MOSFET

Driver with

dead time

control

PRD Y

5, 7

PG ND

SW S1

SW S2

PGND

www.irf.com

10/19/05

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